rasmita sahoo @ on
why the tool is not working for negetive gate and drain bias?
I tried to simulate for the I~V curves of planar CNTFET with negative gate and drain bias (basically a p-type FET), but it shows some error message. As indicated by the simulator we can use a range from -5V to 5V for both gate and drain bias. still it is not working. can you please explain how I can do the simulation with negative bias and why this is happening so.