segmentation fault?
I just compiled the tool on my system (RHEL6), and ran it on the BSIM-SOI Verilog-A code, and it ended with
Segmentation fault (core dumped)
Anyone else have this problem?
segmentation fault?
I just compiled the tool on my system (RHEL6), and ran it on the BSIM-SOI Verilog-A code, and it ended with
Segmentation fault (core dumped)
Anyone else have this problem?
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Geoffrey Coram @ on
I put this in a debugger, which pointed to the printf statement on line 1747 of vachecker-1.0.0/admsXml/verilogaYacc.y
printf("probe = %s\n", tk_ident);
tk_ident is a number, so the %s specifier is incorrect. Actually, it looks like this was a debugging line that was accidentally left in.
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