Semiconductor Process Development and Integration with SEMulator3D
|Description:||The NNIN/C at the University of Michigan will be hosting a presentation on “Materials Modeling and Simulation for Nanotechnology.”, which will be broadcast live as a web based seminar.
Topic: Semiconductor Process Development and Integration with SEMulator3D
Date: May 9th, 2013
Time: 11:00 am – 12:00 pm EDT.
Dr. David M. Fried, Chief Technology Officer (CTO), Coventor.
Fabrication technologies for leading-edge semiconductor devices are increasingly diverse with logic, S/DRAM and flash memory each manufactured using their own dedicated process technologies. With the critical dimensions of these devices continuing to shrink, process engineers must invent new methods to maintain transistor performance and scaling advancements. This rapid evolution in process technology has led to process flows that require hundreds of steps to fabricate transistors with increasingly sophisticated 3D geometry. Greater process complexity has, in turn, dramatically increased the development effort and cost of bringing new technology nodes to production.
SEMulator3D offers an intuitive, graphical software environment for investigating complex sequences of process steps. With the ability to visualize a process step-by-step in three dimensions, engineers can quickly gain valuable insight into the process and predict problems before fabricating actual devices. SEMulator3D can model hundreds of transistors in only a few minutes on a laptop or workstation.
Thursday 9 May 2013, 11:00 AM - 12:00 Noon (UTC -05:00) Eastern Time (US & Canada), Bogota, Lima
|Where:||University of Michigan|