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Nano-Engineered Electronic Device Simulation Node

NEEDS has a vision for a new era of electronics that couples the power of billion-transistor CMOS technology with the new capabilities of emerging nano-devices and a charter to create high-quality models and a complete development environment that enables a community of compact model developers.

NEEDS Team: Purdue, MIT, U.C. Berkeley, and Stanford.

A new initiative aims to help students complement their technical depth with the “breadth at the edges” needed in today’s multidisciplinary environment. The first eight of these short courses will be offered to Purdue University students; four of them will also be freely available on edX. More information.
NEEDS 2017 Annual Review (May 8) has concluded. Posters now available online. 
Forum on Graduate Education for 21st Century Electronics (May 9th) summary is now available online.
(03/27/2017) Paper "Well-Posed Device Models for Electrical Circuit Simulation" by A. Gokcen Mahmutoglu, Tianshi Wang, Archit Gupta, and Jaijeet Roychowdhury

Compact Models

Verilog-A format
supporting resources


Compact models:

Tools for devlopers including MAPP & VALint.

 VALint now in open BETA

Compact models: resources                                                                                        

Seminars and tutorials for developing and publishing compact models

 Publish your compact model in NEEDS

nanoscience to systems

Physically-detailed simulations
system level tools

 Stanford script-based toolkit for system analysis

nanoscience: Seminars, Courses, etc.                                                                                                   

NEEDS Seminars, workshops, nanoHUB-U and more

 Seminar series on devices for 5 nm technology