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  1. Interconnect, Emerging Logic Switches and Processor Core Energy-Delay Optimization

    04 Oct 2017 | Online Presentations | Contributor(s): Chi-Shuen Lee, Saurabh Vinayak Suryavanshi, H.-S. Philip Wong

    NEDS: Nano-Engineered Device Simulation Node

    http://nanohub.org/groups/needs/resources?id=27371

  2. 2D Materials and Graphene: Science to Nanofunctions

    04 Oct 2017 | Online Presentations | Contributor(s): Eric Pop, Saurabh Vinayak Suryavanshi

    In collaboration with Ning Wang, Kirby Smithe and industrial collaboration with ARM, Lam, Northrop Grumman and CEA LETI NEDS: Nano-Engineered Device Simulation Node

    http://nanohub.org/groups/needs/resources?id=27372

  3. A Device to Systems Perspective on Modeling Nanoelectronic Systems

    28 Sep 2017 | Workshops | Contributor(s): Mark Lundstrom, Eric Pop

    This workshop is designed for graduate students and engineers seeking to assess the system performance of novel technologies. The workshop will give material and device researchers a better...

    http://nanohub.org/groups/needs/resources?id=27386

  4. Openning Remarks: The NEEDS Program

    28 Sep 2017 | Online Presentations | Contributor(s): Mark Lundstrom

    NEDS: Nano-Engineered Device Simulation Node

    http://nanohub.org/groups/needs/resources?id=27401

  5. Openning Remarks: The Stanford NEEDS Program

    28 Sep 2017 | Online Presentations | Contributor(s): Eric Pop

    NEDS: Nano-Engineered Device Simulation Node

    http://nanohub.org/groups/needs/resources?id=27406

  6. Nanosystem Design Kit (NDK): Transforming Emerging Technologies into Physical Designs of VLSI Systems

    28 Sep 2017 | Online Presentations | Contributor(s): Gage Hills

    NEDS: Nano-Engineered Device Simulation Node

    http://nanohub.org/groups/needs/resources?id=27370

  7. Carbon Nanotubes: Highly Energy-Efficient Sub-10 nm VLS

    27 Sep 2017 | Online Presentations | Contributor(s): Gage Hills

    NEDS: Nano-Engineered Device Simulation Node

    http://nanohub.org/groups/needs/resources?id=27373

  8. RRAM Models and Applications to Circuits and Systems

    08 Sep 2017 | Online Presentations | Contributor(s): Haitong Li, Zizhen Jiang, H.-S. Philip Wong

    NEDS: Nano-Engineered Device Simulation Node

    http://nanohub.org/groups/needs/resources?id=27297

  9. PHLOGON: Phase-based Logic using Oscillatory Nanosystems

    15 May 2017 | Online Presentations | Contributor(s): Jaijeet Roychowdhury

    We show how DC-powered self-sustaining nonlinear oscillators of practically any type can function as phase-logic latches. Phase-based Boolean computation becomes possible using a wide variety of...

    http://nanohub.org/groups/needs/resources?id=26542

  10. Nanodevices for Bio-inspired Computing

    10 May 2017 | Online Presentations | Contributor(s): Julie Grollier

    In this talk, I will show that, for building the neuromorphic chips of the future, we will need to emulate functionalities of synapses and neurons at the nanoscale. I will review the recent...

    http://nanohub.org/groups/needs/resources?id=26487

  11. Use of RBT unreleased NEM resonator models for device (topological) optimization

    26 Apr 2017 | Papers | Contributor(s): Bichoy W. Bahr

    The use of Phononic Crystals (PnC) in suspended structures and microstructures, such as plates and slabs, has gained a lot of attention in the past years for the wide range of feasible...

    http://nanohub.org/groups/needs/resources?id=26295

  12. ModSpec: an Open, Universal, Low-Level Model API: Proposal for designation as a CMC-approved standard

    27 Mar 2017 | Presentation Materials | Contributor(s): Jaijeet Roychowdhury, Tianshi Wang, A. Gokcen Mahmutoglu, Archit Gupta

    This is a presentation given to the CMC (Compact Modeling Coalition) on March 23, 2017, describing the ModSpec device modelling format and its benefits as a standard for compact model...

    http://nanohub.org/groups/needs/resources?id=26195

  13. Formulating ModSpec or: what is a device, exactly?

    27 Mar 2017 | Presentation Materials | Contributor(s): Karthik Aadithya, Archit Gupta, A. Gokcen Mahmutoglu, Jaijeet Roychowdhury, Tianshi Wang, Bichen Wu

    ModSpec is a mathematically-based, multi-physics format for describing devices and their interaction with networks. This document details the "derivation" of the ModSpec format,...

    http://nanohub.org/groups/needs/resources?id=26197

  14. Well-Posed Device Models for Electrical Circuit Simulation

    27 Mar 2017 | Papers | Contributor(s): A. Gokcen Mahmutoglu, Tianshi Wang, Archit Gupta, Jaijeet Roychowdhury

    This document provides guidelines for creating computational device models that work well in simulation. We build our discussion around the mathematical notion of “well-posedness”. We...

    http://nanohub.org/groups/needs/resources?id=26199

  15. The Berkeley Model and Algorithm Prototyping Platform

    08 Mar 2017 | Online Presentations | Contributor(s): Jaijeet Roychowdhury

    Berkeley MAPP is a MATLAB-based framework for quickly prototyping device compact models and simulation algorithms. MAPP’s internal code structuring, which differs markedly from that...

    http://nanohub.org/groups/needs/resources?id=26051