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PHLOGON: Phase-based Logic using Oscillatory Nanosystems
15 May 2017 | Online Presentations | Contributor(s): Jaijeet Roychowdhury
We show how DC-powered self-sustaining nonlinear oscillators of practically any type can function as phase-logic latches. Phase-based Boolean computation becomes possible using a wide variety of natural and engineered oscillators (including CMOS realizations) as substrates; moreover, it features attractive energy and noise immunity properties, and is capable of running at near-THz speeds. With Moore’s Law facing fundamental barriers an important concern, these results provide motivation for re-examining phase based logic as an alternative for the post-CMOS era.
ModSpec: an Open, Universal, Low-Level Model API: Proposal for designation as a CMC-approved standard
27 Mar 2017 | Presentation Materials | Contributor(s): Jaijeet Roychowdhury, Tianshi Wang, A. Gokcen Mahmutoglu, Archit Gupta
Formulating ModSpec or: what is a device, exactly?
27 Mar 2017 | Presentation Materials | Contributor(s): Karthik Aadithya, Archit Gupta, A. Gokcen Mahmutoglu, Jaijeet Roychowdhury, Tianshi Wang, Bichen Wu
Well-Posed Device Models for Electrical Circuit Simulation
27 Mar 2017 | Papers | Contributor(s): A. Gokcen Mahmutoglu, Tianshi Wang, Archit Gupta, Jaijeet Roychowdhury
This document provides guidelines for creating computational device models that work well in simulation. We build our discussion around the mathematical notion of “well-posedness”. We show that the requirements for a model to be well-posed stem from the internal working mechanisms of simulators. Therefore, our main aim is to provide insight into the numerical procedures used by simulators in order to help model developers avoid ill-posedness issues. We start our discussion with...
The Berkeley Model and Algorithm Prototyping Platform
08 Mar 2017 | Online Presentations | Contributor(s): Jaijeet Roychowdhury
Berkeley MAPP is a MATLAB-based framework for quickly prototyping device compact models and simulation algorithms. MAPP’s internal code structuring, which differs markedly from that of Berkeley SPICE and related simulators, allows users to add new devices with only minimal knowledge of simulation algorithms, and vice-versa. We provide an overview of MAPP's modelling format ModSpec, its Verilog-A translator VAPP and its simulation capabilities. We will also briefly mention recent additions to MAPP, including memristor/RRAM models, BJT snapback models, table-based modelling capabilities, etc..
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