Vijay Mishra et al., “Method of Mfg Optically Intelligent Image Sensors” USPTO application Number: 12/648,081
Vijay Mishra, “Semiconductor ΔE-E detector chip with Low output capacitance” Invention Disclosure filed in BARC
PROFESSIONAL EXPERIENCE
Central Manufacturing Technology Institute (CMTI), Bangalore, Mar 2012 onwards
Scientist/ Teaching Faculty
Key Responsibilities:
Responsibility for streamlining Operations of Nano Manufacturing Technology Centre Lab
Initiating R&D Projects in Nano devices (MEMS/NEMS) and initiating R&D Projects in Sensor Technologies
Teaching a course on Optical Sensor Technologies/MEMS/NEMS
Centre for Nano Science and Engineering (CeNSE), IISc, Bangalore Apr 2009 – Mar 2012
Technology Manager
Key Responsibilities:
Involved in the technical operations of MNCF, CeNSE, IISc, and responsible for the Technical Management and Technical & Commercial Operations of MNCF (Micro and Nano Characterization Facility)
Created a unique nano characterization facility involving Electrical/Mechanical/Material and Optical Characterization techniques under a single roof
Tasked with creating a business model to sustain a facility in academic atmosphere and interacting with Industries to fetch R&D Projects
Responsible for managing the Scientific Program and creating Training Modules for Researchers in Nanoelectronics Domain. Interfacing with World Class Researchers on multidisciplinary areas
Initiated various R&D projects from the Industry and provided Training to Researchers on TCAD Tools/ Semiconductor Equipment. Responsible for MNCF – Industry Interface, designing business models/Pricing Structures to attract industry and National Laboratories to CeNSE
Key Achievements:
Instrumental in establishing a review process for Research Proposals to use CeNSE facility for experimentation
Successfully set up the complete Micro and Nano Characterization Facility at CeNSE, IISc
Involved in the acquisition and commissioning of DC and RF Probe stations for characterization of Semiconductor Devices, AFM, Micro System Analyzer, Scanning Acoustic Microscope, Non-Contact Profiler, Micro Raman/PL, FT-IR/Raman, Solar Simulator, Dual Beam FIB, FE SEMs and Nano particle analyzer.
Key person for designing Several Training Modules, involving fabrication and characterization semiconductor Devices (AFM tips, Cantilevers, MOS Capacitors etc.)
Sarnoff Corporation, India, Bangalore Feb 2005 – Apr 2009
Principal Technology, Image Sensors
Key Responsibilities:
Responsible for building a team to design CCD/CMOS Imagers and interfacing with Technical Director to take R&D and Scientific Imager Design Projects
Provided Technical Leadership to Sarnoff India office and interfaced with R&D organizations like ISRO/IIAP etc. to fetch projects in Imager Design
Key person for proposing modification of 3-phase pixel structure for high speed operation and demonstrating it through Technology Modeling
Played a vital role in the Inventions like “Method of Manufacturing Optically Intelligent Image Sensors” disclosure in process, “Method of Color Sensing with a Single Pixel Structure” and “A novel method of fabricating back illuminated imaging device”
Devised Technology and device simulations for CCD imager to operate with a single clock avoiding complexity of clocking and facilitate fabrication in conventional CMOS foundries
Involved in the Technology modeling for back thinned Imagers using SOI substrates. Estimation of QE and MTF for these novel CCD structures
Key Achievements:
Successfully arranged enough work for the team from Sarnoff Head office through timely and efficient delivery. Instrumental in Process Technology and Device modeling for 3.6 GPPS Back Illuminated TDI CCD Imager using TSUPREM4 and MEDICI
Involved in creating project management documents for the project and estimation of clear schedules and milestones to deliver gds of 128 x 4k TDI CCD imager to the respective foundry
Successfully solved complex problem of DUV instability in Back Thinned Back Illuminated Sarnoff CCD and proposed recommendations for improvement. Approved to teach in Indian Institute of Science, Proficiency Department “Advanced Course on CCD Design”
Successfully worked on the proposals, such as “Extremely Low Cost Imager based on TFT Process”, “Methods for Improvement in TFT Performance”, “Touch Screen using TFT” and “ Imaging System for Solar Coronagraph in ISRO’s Satellite ADITYA for Solar Studies”
Bhabha Atomic Research Centre (BARC), Trombay, Mumbai Dec 2002 – Jan 2005
Visiting Scientist
Key Responsibilities:
Assigned responsibility of working on Various Projects of Semiconductor based radiation sensors
Involved in Technology Delivery and Documentation of technical achievement
Key Achievements:
Credited for Invention Disclosure on "Semiconductor ΔE-E detector chip with Low output capacitance"
Pivotal in design of Silicon Drift Detector (SDD) with integrated Front End Electronics
Successfully carried out design optimizations by Process & Device Simulations using ATHENA and ATLAS (SILVACO tools)
Selected by the Management as a core Member in the detailed study of Technological Issues to develop PN CCD and Depletion FET Array for X-ray Sensing Applications
Credited for suggesting fabricating ΔE-E Detector on Silicon as a Compact Chip which is otherwise a bulky assembly used for identifying Nuclear Particles
EDUCATION & TRAINING
PhD (Sensors Technology), Bhabha Atomic Research Centre, 2002
M. Sc (Microprocessors and Microcomputers), 1st Class, Bombay University, 1998
B .Sc (Physics), 1st Class, Wilson College, Bombay University, 1994
I T Skills:
Proficient with the use LINUX, DOS, Windows XP, SUN OS, MS Office suite and the Internet applications
Sound knowledge of Interface Language Programming using ADC/DAC Cards and Digital I/O Cards
Publications and Conferences: Pl refer to page 4 Annexure ‘A’ to ‘E’ for Refereed Journals, International Conferences, National Conferences, BARC Internal Reports and Scientific Articles in Public Magazines respectively.
PERSONAL DETAILS: Date of Birth: 15th Aug 1973 • Languages Known: English & Hindi • Location Preference: Bangalore • References: Available on request
ANNEXURE ’A’
Refereed Journals
1. Vijay Mishra et al., “Studies on Reducing Leakage Current and Improving Breakdown Voltage of Large-Area Silicon Detectors: Technology and Results” Nuclear Instruments and Methods in Physics Research A527 (2004) 308 – 318.
2. Vijay Mishra et al., “Role of guard rings in improving performance of silicon detectors”, PRAMANA - Indian journal of physics Vol. 65, No. 2 pp. 1- 14 August 2005
3. P. Mehta, Vijay Mishra and S K Kataria, “Silicon Drift Detectors with Integrated JFET: Simulation and Design”, Indian Journal of Pure and Applied Physics, Vol. 43, September 2005, pp. 705- 713
ANNEXURE ’B’
International Conferences
1. Vijay Mishra, et al., “Electrical and radiation performance of silicon diode detectors fabricated at BEL, Bangalore”, Published in the proceedings of the International Conference on Computers, Communications and Devices, 2000 held at IIT, Kharagpur in December, 2000.
2. Vijay Mishra et al., “Development of Silicon Radiation Detectors for Applications in High Radiation Environment”, Published in the proceedings of International Workshop on Physics of Semiconductor Devices, 2001 held at IITD, India.
3. Vijay Mishra et al., “Indian Nanoelectronics Users Program: An Outreach Vehicle to Expedite Nanoelectronics Research in India”, Published in the proceedings of UGIM : Micro/Nano Symposium, 2010, 18th Biennial University/Government/Industry held at Purdue University, USA during June 28 – July 1, 2010
4. Vijay Mishra et al., “Micro and Nano Characterization Facility: Operations Methodology and Technical Management”, Published in the proceedings of UGIM: Micro/Nano Symposium, 2012, University/Government/Industry held at Purdue University, USA during 9-10 July, 2012.
ANNEXURE ’C’
National Conferences
1. Vijay Mishra, P. Mehta and S. K. Kataria, “Simulation Studies for the Development of JFET on High Resistivity Detector Grade Silicon” Published in National Symposium on Nuclear Instrumentation, 2004, India, p. 395.
2. Vijay Mishra, “Development and Study of Silicon Detectors”, published in the proceedings of Symposium on Nuclear Physics held at BARC, India in December, 2003, Volume 46B (2003), p. 604.
3. Vijay Mishra and S K Kataria, “Development of Silicon Detectors for High Resolution Spectroscopy Systems: A Technological Perspective” published in the proceedings of National Symposium on Compact Nuclear Instrumentation and Radiation Detectors to be held at Defense Lab Jodhpur, INDIA March 2-4, 2005.
4. Vijay Mishra and Pourus Mehta, “Simulation Studies for the Integration of P-MOSFET with NJFET on High Resistivity Silicon for Continuous Reset Purpose”, Published in National Symposium on Nuclear Instrumentation, 2004, India, p. 433.
5. Vijay Mishra and S K Kataria, “Development of Semiconductor ΔE-E detector chip using standard Bipolar IC Technology” published in the proceedings of National Symposium on Compact Nuclear Instrumentation and Radiation Detectors to be held at Defense Lab Jodhpur, INDIA March 2-4, 2005.
6. Vijay Mishra, P. P. Vaidya, S.K. Kataria and V. Ramgopal Rao, “Development of Silicon Drift Detector and Low noise JFETs for Low energy X-ray spectroscopy system”, Presented at IITB-FAN National symposium on Nanotechnology held at IIT, Bombay, January 2005.
7. Vijay Mishra, C. G. Panchal, S. K. Kataria and V. Ramgopal Rao, “Development of Thin-Film-Coated High Efficiency Silicon Neutron Sensors”, Presented at IITB-FAN National symposium on Nanotechnology held at IIT, Bombay January 2005.
8. Pourus Mehta, Vijay Mishra, S. K. Kataria & V. Ramgopal Rao, “Silicon Drift Detector: Device Design & Mask Layout” Presented at IITB-FAN National symposium on Nanotechnology at IIT, Bombay January 2005.
9. V.D. Srivastava, V.U. Mishra, Prafulla S. & S.K. Kataria, “X-Ray Sensors with Integrated Front-end Electronics”, Presented at IITB-FAN National symposium on Nanotechnology at IIT, Bombay, January 2005.
10. A Das, V Mishra, M Y Dixit , S K Singh, Anita Topkar, S P Chaganti & M D Ghodgaonkar, “Automated & multi-channel characterization systems for silicon strip Detectors”, Published in proceedings of INIT, 2001.
11. R.G. Thomas, R.P. Vind, A. L. Inkar, A. Saxena, Vijay Mishra and Anita Topkar, “Performance of silicon strip detector with delay line read-out”, Published in the proceedings of DAE-BRNS Symposium on Nuclear Physics held in December, 2002 at M.S. University, TamilNadu, India.
12. V. D. Srivastava, Vijay Mishra, A. Manna & S. K. Kataria, “A silicon detector based compact system for low energy counting applications”, Published in National Symposium on Nuclear Instrumentation, 2004, India, p. 24.
13. S K Kataria, Anita Topkar and Vijay Mishra, “Development of Technology at BEL for 32-channel silicon strip detectors and diode detectors”, Published in the proceedings of INIT, 2001.
14. V.D. Srivastava, V.U. Mishra, P.K. Mukhopadhyay, S.K. Kataria, Manoj Kumar Kori and S.K. Sharma, “A low noise hybrid Preamplifier for Nuclear Spectroscopy applications” Published in the proceedings of NSRP-15 ( National Symposium on Radiation Physics-15) held at BARC, India, November, 2003.
15. Pourus Mehta, Vijay Mishra and S K Kataria, “2D- Device Simulation Studies of Silicon Drift Detector”, Published in National Symposium on Nuclear Instrumentation, 2004, India, p. 438.
16. Pourus Mehta, Vijay Mishra, S. K. Kataria and Ramgopal Rao, “ Silicon Drift Detector: Device Design & Mask Layout” published in the proceedings of National Symposium on Compact Nuclear Instrumentation and Radiation Detectors to be held at Defense Lab Jodhpur, INDIA March 2-4, 2005.
17. S K Kataria, M D Ghodgaonkar, Anita Topkar, M Y Dixit, V B Chandratre, A Das, Vijay Mishra, V D Shrivastava, Bharati Agrawal, Subash Chandran, H V Ananda, Prabhakar Rao, N Shankaranarayana, O P Wadhawan, G S Virdi, R K Shivpuri, Aashutosh Bharadwaj, Kirti Ranjan, R K Choudhari, Bency John, A K Mohanti, R V Shrikanthiah and Acharyulu, “Silicon Strip Detector Development under India-CMS Collaboration”, Published in the proceedings of INIT, 2001
18. V. D. Srivastava, Vijay Mishra, A. Manna and S. K. Kataria, “A silicon detector based compact system for low energy counting applications”, Published in National Symposium on Nuclear Instrumentation, 2004, India, p. 24.
19. TRIDIB KUMAR MAHATA, VIJAY MISHRA, BHASKAR BALACHANDER, M.M. NAYAK, “NON-DESTRUCTIVE TESTING OF PACKAGED MEMS DEVICES AND ICS USING SCANNING ACOUSTIC MICROSCOPE” published in proceedings of AMEET -2012 held at Sultanpur, UP, April 07-08, 2012
20. Vijay Mishra, “MEMS/NEMS Device Characterization: Tools and Methods”, published in proceedings of AMEET -2012 held at Sultanpur, UP, April 07-08, 2012
ANNEXURE ’D’
BARC Internal Reports
1. Vijay Mishra et al., “Design Basis Report on the Development of Silicon Drift Detector with Integrated Front End Electronics”, BARC/2004/I/010
2. Vijay Mishra, M Y Dixit, V D Shrivastava, Anita Topkar, V B Chandratre and S Kataria and A M Shaikh, “ Performance Tests and Radiation Damage Studies of Silicon Detectors Developed Under BARC-BEL Collaboration”, Published as internal barc report, BARC/2004/I/005.
3. Vijay Mishra and S K Kataria, “Electrical and Technological Parameters of Silicon Detectors Developed under BARC-BEL Collaboration” Published as internal barc report, BARC/2004/I/006.
4. Vijay Mishra, V D Shrivastava, V B Chandratre and S K Kataria, “Process and Device Simulation Studies for Silicon Detector Development under BARC-BEL collaboration”, Published as internal barc report, BARC/2004/I/004.
5. Vijay Mishra, “Development of Silicon Detectors for High Resolution Spectroscopy Applications”, Presented in Electronics and Instrumentation Group Seminar, BARC, Mumbai, India, 10th February 2005.
6. S K Kataria, Anita Topkar, Vijay Mishra, V B Chandratre, M Y Dixit, V D Shrivastava, Y P Prabhakar Rao and N P Shankaranarayana, “Technology Development for Fabrication of Large Area Silicon Strip Detector under BARC-BEL Collaboration” Published as internal BARC report, BARC/2004/I/003.
ANNEXURE ’E’
Scientific Articles in Public Magazines
1. Vijay Mishra, "Intensified Nanoelectronics Education in India", Published in Nano Digest, pages 36-39, Volume No: 1, Issue - 11 May' 2010
2. Vijay Mishra, "Emerging Opportunities for Nanoelectronics R & D in India", Published in Nano Digest, pages 14-15, Volume No: 1, Issue - 4 September' 2009