Physics-Based Compact Model for Dual-Gate Bilayer Graphene FETs 1.0.0

By Jorge-Daniel Aguirre Morales1, Sébastien Frégonèse2, Chhandak Mukherjee3, Cristell Maneux3, Thomas Zimmer3

1. CNRS, University of Bordeaux, IMS Laboratory 2. CNRS, IMS Laboratory 3. University of Bordeaux, IMS Laboratory

A compact model for simulation of Dual-Gate Bilayer Graphene FETs based on physical equations.

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Version 1.0.0 - published on 07 Apr 2016 doi:10.4231/D30C4SM1H - cite this

Licensed under NEEDS Modified CMC License according to these terms

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Description

An accurate compact model based on physical mechanisms for dual-gate bilayer graphene FETs is presented. This model is developed based on the 2-D density of states of bilayer graphene and is implemented in Verilog-A. Furthermore, physical equations describing the behavior of the source and drain access regions under back-gate bias are proposed. The accuracy of the developed large-signal compact model has been verified by comparison with measurement data from the literature.

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Key References

[1] J.D. Aguirre Morales, S. Frégonèse, C. Mukherjee, C. Maneux, and T. Zimmer, "An Accurate Physics-Based Compact Model for Dual-Gate Bilayer Graphene FETs", IEEE Trans. Electron Devices, vol. 62, no. 12, pp. 4333-4339, Dec. 2015.

[2] C. Mukherjee, J.-D. Aguirre-Morales, S. Frégonèse, T. Zimmer, and C. Maneux, “Versatile compact model for graphene FET targeting reliability-aware circuit design,” IEEE Trans. Electron Devices, vol. 62, no. 3, pp. 757–763, Mar. 2015.

[3] S. Frégonèse, M. Magallo, C. Maneux, H. Happy, and T. Zimmer, “Scalable electrical compact modeling for graphene FET transistors,” IEEE Trans. Nanotechnol., vol. 12, no. 4, pp. 539–546, Jul. 2013.

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