R3 Model Documentation

Introduction r3 is a compact model for polysilicon (poly) resistors, 3-terminal JFETs, and diffused resistors (which are really just JFETs, often with a large pinch-off voltage so they are fairly linear). Nonlinearity in poly resistors comes from self-heating and, to a lesser extent, from MOS action, where the potential difference between the resistor body and the semiconductor region underneath it modulates conduction through the body of the resistor. Nonlinearity in diffused resistors and JFETs also comes from self-heating and depletion region modulation with bias, although from pn-junction rather than MOS physics, and in addition from velocity saturation. r3 models all of these causes of nonlinearity, along with their geometry and temperature dependencies, and includes models for noise, statistical variation, parasitic capacitance, and parasitic leakage currents (which are primarily important for JFETs and diffused resistors). Terminology and Notation: device any semiconductor component that r3 is applicable to (poly resistor, diffused resistor, 3-terminal JFET) non-pinch-off operation when neither end of a device is pinched off (analogous to MOSFET strong inversion non-saturation) drain pinch-off operation when one end of a device is pinched off (analogous to MOSFET strong inversion saturation) full pinch-off operation when both ends of a device are pinched off (analogous to MOSFET weak inversion) Vb voltage across the intrinsic body portion of the device V (i2)–V (i1) Ib current through the intrinsic body portion of the device (see equivalent circuit below) Vc1 voltage across the intrinsic terminal 1 parasitics V (c)–V (i1) Vc2 voltage across the intrinsic terminal 2 parasitics V (c)–V (i2) Parameters and nodes are set in Courier New font. k is Boltzmann's constant and q is the magnitude of the electronic charge. The lareg-signal equivalent circuit for r3 is shown below: The power generated by the electrical part of r3 (the left side of the network above), Ith, drives the thermal part of r3 (the right side of the network above), and the behavior of the electrical part depends on the local temperature rise, Temp(dt), generated by the thermal part. The electrical and thermal parts are solved self-consistently. The parasitic capacitances Cp1 and Cp2 include both linear components and non-linear pn-junction components, for polysilicon resistors and diffused resistors or JFETs, respectively. The parasitic currents Ip1 and Ip2 are pn-junction currents, including breakdown, so are only relevant for diffused resistors and JFETs. r3 has the same physical basis and capabilities as the r3_cmc model, but includes the following enhancements: improved temperature variation modeling (velocity saturation, depletion potential, thermal conductance) improved geometry dependence modeling (depletion potential, temperature coefficients, drain pinch-off smoothing) ability to turn off all nonlinearities (separately or collectively), or make them arbitrary small, without affecting numerical robustness drain-induced barrier lowering (DIBL) and channel length modulation (CLM) models for significantly improved modeling of JFETs significantly more accurate pinch-off models, selectable via the new switch parameter sw_accpo=1 or 2 conductance in full pinch-off is limited to a minimum value to prevent numerical problems code improvements, bug fixes, and code style changes r3 is not backwards compatible with r3_cmc, you will get different results if you simulate with the same parameters: The added temperature dependence of velocity saturation has one component that is physically linked to the temperature dependence of the low field mobility (i.e. the sheet resistance), so for any diffused resistor or JFET that is significantly affected by both velocity saturation and self-heating this will cause some difference. The current in full pinch-off is different, even for sw_accpo=0 (it now gives the correct slope for ∂ln(Ib)/∂Vb whereas previously it was a factor of two too big— setting the parameter nst to half its value recovers the previous behavior). The capacitance is different for JFETs and diffused resistors; the pn-junction depletion capacitance for each end of a device smoothly goes to zero as it enters pinch-off. For diffused resistors that do not approach pinch-off operation the difference is minor, for JFETs in drain or full pinch-off the difference is significant. Details of the theory that underlies r3 can be found in [1] and [2]. Details of robust parameter extraction algorthms for r3 can be found in [2] and [3].

Instance Parameters Instance Parameters: Name Default Min. Max. Unit Description m 1 1 inf multiplicity factor (number in parallel) w 1.0e-6 0.0 inf m design width of resistor/JFET body l 1.0e-6 0.0 inf m design length of resistor/JFET body wd 0.0 0.0 inf m dogbone width (total; not per side) a1 0.0 0.0 inf m2 area of node n1 partition p1 0.0 0.0 inf m perimeter of node n1 partition c1 0 0 inf # contacts at node n1 terminal a2 0.0 0.0 inf m2 area of node n2 partition p2 0.0 0.0 inf m perimeter of node n2 partition c2 0 0 inf # contacts at node n2 terminal trise 0.0 °C local temperature delta to ambient (before self-heating) nsmm_rsh 0.0 number of standard deviations of local variation for rsh nsmm_w 0.0 number of standard deviations of local variation for w nsmm_l 0.0 number of standard deviations of local variation for l sw_noise 1 switch to include noise: 0=no and 1=yes sw_et 1 switch to include self-heating: 0=no and 1=yes sw_lin 0 switch to force linearity: 0=no and 1=yes sw_mman 0 switch to enable mismatch analysis: 0=no and 1=yes The switch parameters can also be specified as model parameters, and a value specified on an instance line overrides a value specified on a model card. The following diagram shows how the instance parameters should be determined for a typical resistor layout (note that the end region dogbone may be asymmetric between the two sides). The total width of an end region is where the contact width, contact spacing, and contact-to-edge distances, wc, wc2c, and wc2e, respectively, are shown in the layout. If c1 is zero (which happens for non-end sections of a multi-section model) then a1 and p1 should be calculated as half of the area and perimeter, respectively, of the body of the resistor (i.e. 0.5wl and l, respectivey). If c1 is greater than zero then the area and (non-body adjacent) perimeter of the left end region should be added to these values. Similarly for a2 and p2.

Geometry Dependence Accounting for optical shrinking and unit scaling, in units of microns the drawn width and length of the resistor body and dogbone width are                The perimeter and area of the resistor body are      The perimeters of each partition (half of the body plus, if contacted, the end region) are      and their areas are      The effective electrical width (see [4]) and length of the resistor body are           where the effective length offset term is reduced by half or eliminated entirely when one or no ends of the device are contacted, respectively. This is to facilitate implementation of multi-section sub-circuit models. The depletion potential and depletion factor geometry dependencies are           where W and L are the effective width and length if sw_dfgeo=1 and the design width and length otherwise (in units of micron). From these, the pinch-off voltage is computed as      The zero-bias resistor body resistance and conductance factor are      and the contact resistances at each end are      The DIBL and CLM parameter geometry dependencies are      and for the saturation smoothing parameter      The thermal conductance and thermal capacitance include fixed, perimeter, area, and contact components           These scale with drawn, rather than effective, geometries because the effective geometries for the thermal conductance and capacitance can be different from the effective electrical geometries. It is easily shown that any difference between drawn and effective dimensions can be subsumed in the fixed and perimeter component coefficients. The temperature coefficients for the body resistance vary with geometry as           The geometry dependence of flicker noise is detailed in the section on noise modeling.

Temperature Dependence If T is the device temperature (in °C) define      Unless otherwise noted, self-heating is included in the calculation of dT and rT. The zero-bias resistance varies with temperature as      which also affects the conductance factor gf, which varies reciprocally as R0. The contact resistances at each end vary with temperature as      The effect of velocity saturation in r3 is primarily determined at high field by the ecrit parameter. In first order theory this is determined as Ecrit=vsat/μ0 where vsat is the saturation velocity and μ0 is the low field mobility. R0 varies reciprocally as μ0, therefore in part the temperature dependence of Ecrit should be that of R0. Including an additional temperature dependence for vsat gives      The depletion potential varies with temperature as      but for this calculation the effect of self-heating is not included in the computation of dT. The thermal conductance temperature variation is      and this is applied without the effect of self-heating included in rT. The effective thermal conductance is determined by the whole region through which heat flows, and when self-heating occurs the temperature of this region is not uniform. Therefore, the effect of self-heating on gTH needs to account for the “distributed” nature of the heat flow, and should be based on an effective temperature that is between that of the device and the ambient environment. In r3 this accomplished using the technique presented in [5]. The flicker noise coefficient temperature variation is      For the area and perimeter components of the parasitic pn-junction model, the saturation current temperature variations are      the built-in potential temperature variations are      (with a physically based modification to smoothly limit to zero for high temperatures), and the zero-bias capacitance per unit area and per unit perimeter vary with temperature as      The breakdown voltage and breakdown current ideality factor vary with temeprature as      and

Model Equations The current in the resistor body is modeled in r3 by      where the effective conductance of the resistor body is      Expressions for the conductance factor gf, depletion factor df, and depletion potential dp are detailed in the geometry dependence section, and the temperature dependence for the first and last of these are detailed in the temperature dependence section. The effect of self-heating is accounted for in gf. The effective body voltage Vb,eff is the body voltage smoothly limited to the saturation voltage Vsat      (this form is used to preserve symmetry). The value of ats is modified slighty for non-zero sw_accpo. Vsat is computed based on the asymptote of the velocity saturation model detailed below. The channel length modulation terms, those with parameters that start with “clm”, include a simple linear form and a more physically based non-linear term, and note that both CLM terms are formulated in terms of Vb to capture the influence of the body voltage when it is greater than Vsat. Velocity saturation is included through the mobility reduction term      where the field across the body of the resistor is      and      This model has the following characteristics, which are required physically: it has the value zero for E=0; it has a slope of zero for E=0; it is smooth and symmetric about E=0; it asymptotically approaches 1+(E–ecorn)/Ecrit for large E. The effective value of Vc1 is calculated as      which includes limiting in pinch-off and both linear and non-linear DIBL components. As for the CLM terms, note that DIBL is a function of Vb, not the limited form Vb,eff, because it must include the influence of the body voltage on the device behavior for Vb>Vsat. Pinch-off behavior is primarily of importance for JFETs, and three models, selectable via the sw_accpo switch, are available. The computationally simplest, and therefore fastest to simulate, limiting is selected with sw_accpo=0, however this model only fairly crudely approximates the physically expected 1–exp(–Vb/φt) variation of Ib with Vb in full pinch-off. Setting sw_accpo=1 selects a model that more accurately approximates that behavior, at the expense of increased computation time, and sw_accpo=2 selects an even more accurate, but slightly more computationally expensive, form. A minimum conductance is enforced in full pinch-off to avoid numerical computation issues.

Noise Modeling The thermal noise for the body of the resistor is      where geff is the effective conductance of the resistor body, calculated including depletion pinching, velocity saturation, and self-heating. The flicker (i.e. 1/f ) noise is current dependent [6] and has the physical geometry dependence detailed in [7]      where W and L are effective geometries if sw_fngeo is 1 or drawn geometries if it is zero. Note that W and L are in units of micron, not meters, so the model parameter kfn should be in units of μm2 (note that for afn≠2 the unit differs from this; it is recommended that you do not change afn from its default value of 2); The thermal noises for the contact resistances at each end are      The shot noises for the parasitic diode currents, which include components for both the ideal diode and breakdown currents, are      where the ideal saturation currents are      The above form for shot noise is more accurate than the conventional 2qI form and, in the absence of the breakdown current, is consistent with the result of van der Ziel [8].

Statistical Variation Modeling The r3 model explicitly includes a capability to model statistical variability, including for both global (correlated between devices in a die) and local (i.e. mismatch, uncorrelated between devices on a die) variation. The statistical model is physically based and is built-in, which obviates the need for using a sub-circuit (which is conventionally how variability is added on top of an existing compact model). The form of statistical model is as described in [9]: each statistical parameter is characterized by a standard deviation of global variation σglobal, a number of standard deviations of global variation nsig, a standard deviation of local variation σlocal (which varies reciprocally with geometry), and a number of standard deviations of local variation nsmm. A process is characterized by determining σglobal and σlocal for each statistical parameter. Corner models are defined by setting specific values of nsig, and Monte Carlo type simulations are done by generating random values for nsig and, for every device selected for mismatch analysis, for nsmm. Note that mismatch is not a pair-wise phenomena, it comes from atomic level variations (e.g. random dopant fluctuations, line edge roughness) that affect every device differently. It is commonly measured from the difference in electrical characteristics between of a pair of devices, but in circuits like resistor ladders there are more than two devices, so mismatch needs to be modeled and simulated as variations that are uncorrelated between devices. If sw_mman is set to 1 r3 includes mismatch. The effective width, effective length, and sheet resistance are varied as                where the subscript nom indicates the nominal value of the parameter and m is the multiplicity factor (i.e. number of devices in parallel). The 0.01 factor in the last expression converts percentage variation to relative variation. Note that physically line edge roughness in width averages over length, so the mismatch standard deviation of width varies reciprocally as the square root of length, line wedge roughness in length averages over width, so the mismatch standard deviation of length varies reciprocally as the square root of width, and random dopant fluctuation averages over area, so the mismatch standard deviation of sheet resistance varies reciprocally as the square root of area. As noted in [9], the variations in the lateral dimensions width and length are absolute, and the variation in sheet resistance is relative. In addition, physically if relative variations in a quantity are large the statistical distribution they follow is better modeled as log-normal than Gaussian. This can happen for sheet resistance, and is implemented via the exponential mapping in third expression above. For small variations in sheet resistance exp(x)≈1+x so the distribution form reduces to Gaussian. If sw_mman is set to zero, then mismatch variation is turned off. Because total variance is the sum of global variance plus local variance, in this case the variations in the statistical parameters are computed as

Parasitic Modeling For poly resistors isa and isp should be left at their default value of zero, in which case the leakage currents to the control terminal are zero      For diffused resistors the parasitic pn-junction (i.e. diode) currents, with area and perimeter components, are modeled as           Junction breakdown is also included as           giving total parasitic currents for each end of      where a standard SPICE minimum conductance term is included, to aid numerical solution roubustness. The parasitic capacitances include bias independent components, intended for poly resistor modeling, and bias dependent components, for parasitic pn-junction capacitance modeling for diffused resistors and JFETs. The complete capacitances are           The parasitic pn-junction capacitances are linearized for forward biases greater then fc multiplied by the built-in potential for each component, and smoothly reduce to zero in pinch-off.