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Illinois Nano EP Seminar Series Spring 2011: Development of 90nm InGaAs HEMTs and Benchmarking Logic Performance with Si CMOS

By Kuang-Yu (Donald) Cheng

University of Illinois at Urbana-Champaign

Published on

Abstract


We have developed 90nm InGaAs Channel HEMT process and compared the DC and RF performance to 90nm Si nMOSFET by direct measurement (shown in Table II). With nonself-aligned structure, comparable DC characteristics and superior RF performance are already demonstrated. The extracted parameters together with logic figures of merit shows 90nm InGaAs HEMT has the promise of 2 times better performance compared to 90nm Si CMOS. This work contributes benchmark of III-V channel FET for beyond CMOS logic applications and provides insights for improvement in design layout and process development of III-V HEMT for logic applications

Bio

Donald Cheng, Ph.D. student in Electrical and Computer Engineering with Prof. Milton Feng

Cite this work

Researchers should cite this work as follows:

  • K.Y. (Donald) Cheng, D. Chan, F. Tan, H. Xu, M. Feng, "Development of 90nm InGaAs HEMTs and Benchmarking Logic Performance with Si CMOS," IEEE Compound Semiconductor Integrated Circuit Symposium, (2010
  • Kuang-Yu (Donald) Cheng (2012), "Illinois Nano EP Seminar Series Spring 2011: Development of 90nm InGaAs HEMTs and Benchmarking Logic Performance with Si CMOS," http://nanohub.org/resources/12406.

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Submitter

Javid Mohammed Ali

University of Illinois at Urbana-Champaign

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