[Illinois] Nano EP Series: Thermoelectrics of Roughened Silicon Nanowire Arrays
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The possibility of using silicon as a thermoelectric material for waste heat recovery is technologically significant due to silicon's economy of scale and vast processing knowhow. Patterning silicon as nanowires with roughened sidewalls is shown to enhance the thermoelectric figure-of-merit ZT by order of magnitude compared to the bulk at 300 K. This enhancement is primarily achieved by reduction of thermal conductivity of silicon below 5 W/mK due tophonon scattering from the rough boundaries. We developed an electroless etching technique to generate nanowire arrays (NWAs) with controlled surface roughness, morphology, porosity and doping. The device-level measurements of the thermoelectric properties of the NWAs reveal reduction in the thermal conductivity of NWAs below the Casimir limit due to sidewall roughness. We also observe a reduction in the Seebeck coefficient of NWAs in comparison to the bulk silicon due to the quenching of phonon drag.
Researchers should cite this work as follows:
Jyothi Sadhu (2012), "[Illinois] Nano EP Series: Thermoelectrics of Roughened Silicon Nanowire Arrays," https://nanohub.org/resources/16093.