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Modeling Interface-defect Generation (MIG)

Analyzes device reliability based on NBTI

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Version 2.1 - published on 22 Jan 2014

doi:10.4231/D3FQ9Q555 cite this

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Abstract

MIG contains a demonstration of Negative Bias Temperature Instability (NBTI), which is a major reliability issue for nanoscale MOS devices. When a device is stressed at negative voltage, depassivation of SiH bonds in the interface occurs. As a result, interface traps are generated (reaction) and the resulting hydrogen species diffuses away from the interface (diffusion). Hence, device characteristics (threshold voltage, mobility, drain current, etc) degrades with time and such degradation satisfies a power law (~ time^n) formula.

Implementing such Reaction-diffusion (RD) model, MIG shows how threshold voltage of a PMOS device can change with time at different voltages and temperatures.


Negative Bias Temperature Instability Basics/Modeling

Credits

Thanks to the following people for their contributions to this work:

Dhanoop Varghese ... Experiment
Souvik Mahapatra ... Experiment

This work was supported by NCN, NSF, and SRC.

Cite this work

Researchers should cite this work as follows:

  • "Recent Issues in Negative Bias Temperature Instability: Initial Degradation, Field-Dependence of Interface Trap Generation, and Hole Trapping Effects and Relaxation," A. E. Islam, H. Kufluoglu, D. Varghese, S. Mahapatra, and M. A. Alam, Special Issue on Modeling of Nanoscale Transistors (Invited), IEEE Transaction of Electron Devices, 54(9), pp. 2143-2154, 2007.

  • "A Comprehensive Model for PMOS NBTI Degradation," M. A. Alam and S. Mahapatra, Special Issue of Journal of Microelectronics Reliability (Invited), 45(1), pp. 71-81,(2005).

  • Ahmad Ehteshamul Islam; HALDUN KUFLUOGLU; Muhammad Alam (2014), "Modeling Interface-defect Generation (MIG)," http://nanohub.org/resources/devrel. (DOI: 10.4231/D3FQ9Q555).

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