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[Illinois] CNST 2013: Technology Scaling in the Mobility Era

By Mark Bohr

University of Illinois at Urbana-Champaign

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Abstract


Bio

Mark Bohr, Senior Fellow and Director of Process Architecture and Integration, Intel Corporation

After earning his master's degree at Illinois, Mark T. Bohr joined Intel Corporation and initially worked on charge coupled device (CCD) memories at Intel's Santa Clara, California facility. In 1978, he transferred to Portland, Oregon to become one of the founding members of Intel's Portland Technology Development group. Since then, he has been the architect and innovator for every Intel CMOS logic technology for SRAM and microprocessor products since the dawn of high performance CMOS in the early 1980s. He was the early development program manager for Intel's 45nm microprocessor technology featuring revolutionary high-k + metal gate transistors and is presently directing early development activities for the 22nm generation microprocessor technology.

For more than 25 years, Bohr has shared his innovation and knowledge with the technology community worldwide through many courses inside of Intel, presentations at major IEEE conferences, and numerous publications. His inventions have been documented in 50 patents on integrated circuit processing, and in 2002 he was elected to the position of Intel Senior Fellow, one of only four in the corporation at the time.

(Source: http://engineering.illinois.edu/alumni/distinguished/2008/bohr-mark-0)

Cite this work

Researchers should cite this work as follows:

  • Mark Bohr (2013), "[Illinois] CNST 2013: Technology Scaling in the Mobility Era," http://nanohub.org/resources/18145.

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Submitter

NanoBio Node, Adeeb Yunus

University of Illinois at Urbana-Champaign

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