Verilog-A is the standard language for compact model development and implementation.
This talk provides some background on the rationale for and development of Verilog-A,
summarizes the current status of the language, and provides a short introduction and
some tips for writing good compact models in Verilog-A. Pointers to more extensive
references are also provided.
The presenter, Dr. Geoffrey Coram, works for
Analog Devices, Inc. (ADI) in the CAD development group, improving ADI's internal
circuit simulator and evaluating next-generation simulation tools. He has a
particular focus on compact device models in Spice simulators and chaired the
Accellera Verilog-AMS subcommittee for compact modeling extensions, which
identified the extensions necessary for Verilog-AMS to become the standard,
simulator-independent language for Spice modeling. Dr. Coram's co-author is
Dr. Colin McAndrew of Freescale, who is known for many contributions to
compact modeling and is a strong advocate of the use of Verilog-A.
Researchers should cite this work as follows: