Developing a compact model seems like it should be a fairly simple process: start with the basic physics, refine with a bit of engineering judgment, if you don't fully understand the device behavior mix in some empirically derived fitting expressions, and voila you have a model. Unfortunately, history is replete with compact models that have egregious problems, from violating the first law of thermodynamics to violating the sanctity of the IEEE 754 standard for floating point arithmetic. This talk will review some of the worst bloopers in models I have come across, and provide a framework to use to help avoid making similar blunders in models you develop. I will also recount some examples where seemingly finicky details of a model are critical to meeting real world needs.

Colin McAndrew received the Ph.D. and M.A.Sc. degrees in Systems Design Engineering from the University of Waterloo, Waterloo, Ontario, Canada, and the B.E. (Hons) degree in Electrical Engineering from Monash University, Melbourne, Victoria, Australia. From 1987 to 1995 he was at AT&T Bell Laboratories, Allentown PA. Since 1995 he has been with Freescale Semiconductor (formerly Motorola), in Tempe AZ. His work is primarily on compact and statistical modeling and characterization for circuit simulation, for MOS transistors, bipolar transistors, and passives, and he has been a primary advocate of the use of Verilog-A and compilers for compact modeling. He was a recipient of the Ian Langlands Medal from the Institute of Engineers of Australia in 1978, best paper awards for ICMTS in 1993 and CICC in 2002, and the BCTM Award in 2005. He is a Fellow of the IEEE, was an editor of the IEEE Transactions on Electron Devices, and is or has been on the technical program committees for the IEEE BCTM, ICMTS, CICC, and BMAS conferences.

NEEDS; Nano-Engineered Electronic Device Simulation Node

Researchers should cite this work as follows:

• Colin McAndrew (2014), "How Really Smart People can Write Really Dumb Models," https://nanohub.org/resources/21433.

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