Physics-based compact models of transistors play two complementary roles. First, they establish an analytical mathematical description of the device, which helps interpret measurements or detailed simulations and make predictions; second, they form the basis of models used in circuit simulators. More recently, as silicon field-effect transistors (FETs) started approaching quasi-ballistic operation and new channel materials have emerged, interest has shifted to physics-based models to explore the limits of nanoscale FET performance. Toward this end, the MIT virtual source (MVS) model provides a simple, physical description of transistors that operate in the quasiballistic regime. With only a few fitting parameters, most of which have a physical significance, the model has served well for technology benchmarking. Being the pilot NEEDS compact model active in Aug. 2013, MVS serves as the benchmark for the certification and deployment of other NEEDS models through the nanoHUB website. With 768 user downloads, the MVS model is the second most downloaded NEEDS model on nanoHUB. Since the release of its first version that was developed only for silicon nanotransistors, the MVS model has evolved significantly; nanoHUB now hosts MVS model for ambipolar graphene RF transistors and III-V high electron mobility transistors.
In my talk, I will walk you through the fundamental steps involved in developing compact models, using the MVS model as an example. From the “lessons learned” in the process of MVS release in 2013 and its subsequent updates, I will provide a checklist of good practices to adopt while writing your own compact model. I will also visit the broad requirements that models must meet to be NEEDS- certified, and the process for deploying compact models on the nanoHUB website, which has served as an ideal place for hosting open source projects focused on the development of nanotechnology.
Shaloo Rakheja received the B.Tech. degree in Electrical Engineering from Indian Institute of Technology, Kanpur, India, in 2005, and the M.S. and Ph.D. degrees in Electrical and Computer engineering from the Georgia Institute of Technology (Georgia Tech), Atlanta, in 2009 and 2012, respectively. She started as a Component Engineer at Intel, Bangalore and later worked as an Analog Engineer at Freescale Semiconductor, Noida from 2006 to 2007. Prior to joining NYU in 2015, she worked as a Postdoctoral Associate with Prof. Dimitri Antoniadis at Massachusetts Institute of Technology from 2013-2014. Her research interests are in modeling and simulating electron transport in nanoscale transistors. She is also interested in novel, beyond-CMOS devices using alternate state variables, energy harvesting for sensor networks and other mobile devices, and flexible and transparent electronics.
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