PN Junction Lab
- Everything you need to explore and teach the basic concepts of P-N junction devices.
Edit the doping concentrations, change the materials, tweak minority carrier lifetimes,
and modify the ambient temperature. Then, see the effects in the energy band diagram, carrier densities,
net charge distribution, I/V characteristic, etc.
Tutorial on PN Junction Theory and modeling is found on the following links:
Some interesting exercises regarding pn-junction theory and modeling are listed below:
Improvements / modifications in subsequent version releases:
1.6 - Fixed for improved meshing in PIN diode case. Fixed Recombination rate sign.
1.53 - Meshing improved by adding doping dependence on mesh density.
1.52 - Improved meshing using inhomogenous grid.
1.51 - Corrected excess minority carrier error.
1.5- Added depletion approximation.
1.4 - Added status bar for running simulation.
1.3.1 - Updated the output plot labeling.
1.3 - Added Current Density (A/cm2) plot in output for each bias in sequence.
1.2.2 - Increased the input Voltage (V) range for simulations.
1.2.1 - Fixed for post-run deletion of redundant output files.
1.2 - Added CV (Capacitance-Voltage) curve in the output plot. CV across PN junction can now be visualized
1.1.2 - Updated for meshing density for faster convergence.
1.1.1 - Updated for minimum number of nodes to be used in simulation.
1.1 - Fixed minor bug in bias point discrepancy . Converted bias points from integer to float
1.0 - 1D PN-Junction tool launched.
PADRE (Pisces And Device REplacement) developed by Mark Pinto at AT&T Bell Labs.
Researchers should cite this work as follows:
Matteo Mannino; Dragica Vasileska; Michael McLennan; Xufeng Wang; Gerhard Klimeck; Saumitra Raj Mehrotra; Benjamin P Haley (2014), "PN Junction Lab," http://nanohub.org/resources/pntoy. (DOI: 10.4231/D3JQ0SV1J).