IWCE 2015 presentation. This paper discusses a multi-scale device modeling scheme for analyzing self-heating effects in nanoscale silicon devices. A 2D/3D particle-based device simulator is self-consistently coupled to an energy balance solver for the acoustic and optical phonon bath. This simulator is used to analyze the hot-spot temperature and location in various SOI devices, dual gate structures and nanowire transistors. This device simulator has been coupled to a SILVACO simulation tool which solves for heat transport in interconnects at the circuit level. The proposed multi- scale simulation scheme allows for analysis of thermal effects in an integrated circuit. Simulation results obtained with this simulator are in agreement with experimental measurements from IMEC using specialized heater-sensor test structures in common-source and common-drain configurations.
In collaboration with A. Shaik, X. Guo (Arizona State University), E. Bury (IMEC) and B. Kaczer (Ss. Cyril and Methodius University, Skopje, Macedonia)
Cite this work
Researchers should cite this work as follows:
Suleman Sami Qazi; Akash Anil Laturia; Robin Louis Daugherty; Katerina Raleva; Dragica Vasileska, "Multi-Scale Modeling of Self-Heating Effects in Nano-Devices," in Computational Electronics (IWCE) 2015 International Workshop on, DOI: Not available in IEEE Xplore digital library. Full Website Here
North Ballroom, PMU, Purdue University, West Lafayette, IN