tsuprem4

By Steven Clark

Purdue University

TSUPREM-4 is a computer program for simulating the processing steps used in the manufacture of silicon integrated circuits and discrete devices.

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Version 2016-03 - published on 31 Jan 2023

doi:10.21981/G7SH-5D85 cite this

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Usage

World usage

Location of all "tsuprem4" Users Since Its Posting

Cumulative Simulation Users

446

20 26 34 35 35 36 36 56 69 89 89 90 104 105 116 116 117 117 131 133 150 170 172 172 185 190 192 192 192 192 193 209 209 214 215 215 239 251 257 257 257 258 258 266 276 277 278 278 298 302 309 309 309 309 309 310 328 328 329 329 345 349 351 351 352 352 352 353 374 377 378 378 378 379 380 380 380 380 380 382 386 386 386 386 386 388 395 396 397 399 400 404 405 408 408 409 409 411 413 413 413 414 414 414 414 415 415 417 417 417 417 417 417 417 417 417 418 419 419 419 419 419 419 419 419 419 419 421 421 423 428 428 428 428 428 428 428 428 428 428 428 429 429 429 429 429 429 429 429 429 430 430 431 431 432 432 432 432 433 433 433 433 433 433 435 435 435 435 435 435 435 435 435 436 436 437 437 437 437 437 437 437 438 438 439 439 439 439 440 440 440 440 440 440 440 440 440 441 441 441 442 442 443 443 443 444 444 444 444 444 444 444 444 444 444 444 444 444 444 444 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 445 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446 446

Simulation Runs

60,741

664 1992 5286 5419 5528 5644 5717 6198 6743 10701 11392 11418 12053 12748 15360 15721 15976 16234 16417 17504 19858 23908 25075 25094 25906 26409 29389 29391 29423 29431 29453 30184 30661 34420 35000 35152 36471 37931 43050 43184 43248 43329 43354 43622 45136 47036 47351 47414 48150 48480 50192 50343 50349 50444 50537 50567 51553 52757 54296 54296 54557 55015 55487 55595 55597 55598 55598 55608 56849 57713 58049 58066 58078 58127 58177 58259 58260 58263 58298 58351 58384 58500 58538 58558 58562 58702 58929 58960 58961 59044 59045 59131 59144 59221 59230 59238 59241 59331 59917 60012 60049 60287 60287 60293 60293 60299 60299 60305 60305 60305 60305 60306 60306 60309 60309 60309 60312 60316 60316 60316 60316 60319 60319 60322 60322 60322 60323 60334 60382 60394 60539 60539 60540 60540 60540 60540 60540 60588 60588 60588 60589 60599 60604 60604 60604 60604 60604 60604 60604 60604 60606 60606 60608 60623 60637 60637 60637 60637 60649 60649 60649 60649 60649 60640 60650 60650 60650 60653 60653 60656 60659 60659 60662 60668 60675 60678 60678 60678 60678 60678 60678 60678 60681 60681 60684 60687 60687 60687 60688 60688 60688 60688 60688 60688 60688 60688 60688 60690 60690 60690 60693 60693 60697 60697 60697 60702 60705 60705 60705 60705 60705 60705 60705 60705 60705 60705 60714 60714 60720 60726 60727 60730 60730 60732 60732 60732 60732 60732 60732 60732 60732 60732 60732 60732 60732 60732 60732 60733 60733 60733 60733 60733 60733 60733 60733 60733 60733 60733 60733 60733 60733 60733 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741 60741
Overview
Average Total
Wall Clock Time 4.82 minutes 200.34 days
CPU time 59.4 seconds 15.03 hours
Interaction Time 49.41 minutes 31.26 days