A Device to Systems Perspective on Modeling Nanoelectronic Systems

By Mark Lundstrom1, Eric Pop2

1. Electrical and Computer Engineering, Purdue University, West Lafayette, IN 2. Electrical Engineering, Purdue University, West Lafayette, IN

Category

Workshops

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Abstract

This workshop is designed for graduate students and engineers seeking to assess the system performance of novel technologies. The workshop will give material and device researchers a better understanding of system constraints, and it will give designers a better understanding of how to assess novel device technologies. The use of open-source system analysis scripts developed at Stanford University will be illustrated by several case studies.

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Location

Room 101X, Paul G. Allen Building, Stanford University, Stanford, CA

NEEDS: Nano-Engineered Electronic Device Simulation Node

In This Workshop

  1. Interconnect, Emerging Logic Switches and Processor Core Energy-Delay Optimization

    04 Oct 2017 | Online Presentations | Contributor(s): Chi-Shuen Lee, Saurabh Vinayak Suryavanshi, H.-S. Philip Wong

  2. 2D Materials and Graphene: Science to Nanofunctions

    04 Oct 2017 | Online Presentations | Contributor(s): Eric Pop, Saurabh Vinayak Suryavanshi

  3. Openning Remarks: The NEEDS Program

    28 Sep 2017 | Online Presentations | Contributor(s): Mark Lundstrom

  4. Openning Remarks: The Stanford NEEDS Program

    28 Sep 2017 | Online Presentations | Contributor(s): Eric Pop

  5. Nanosystem Design Kit (NDK): Transforming Emerging Technologies into Physical Designs of VLSI Systems

    28 Sep 2017 | Online Presentations | Contributor(s): Gage Hills

  6. Carbon Nanotubes: Highly Energy-Efficient Sub-10 nm VLS

    27 Sep 2017 | Online Presentations | Contributor(s): Gage Hills

  7. RRAM Models and Applications to Circuits and Systems

    08 Sep 2017 | Online Presentations | Contributor(s): Haitong Li, Zizhen Jiang, H.-S. Philip Wong