p-bits for Probabilistic Spin Logic (PSL): A Brief Introduction

By Supriyo Datta

Electrical and Computer Engineering, Purdue University, West Lafayette, IN

Published on

Abstract

Digital electronics is based on stable bits that can have one of two values, 0 and 1. At the other extreme we have quantum computing using using q-bits that can be in superposition states that are 0 and 1 at the same time. In our recent work we have introduced a concept that is intermediate between bits and q-bits, namely a probabilistic bit or p-bit that fluctuates randomly between 0 and 1.

 

pBits

 


 

TALKS

  • This talk provides a 10-minute introduction by Prof. Datta.

  • An extended 50-minute version of this talk can be viewed here.

  • An hourlong tutorial lecture by Dr. Kerem Camsari can be viewed here.


SLIDES FROM A RECENT TALK

REVIEW ARTICLE

TWO RECENT HIGHLIGHTS

  • Emulating qubits using p-bits

K.Y. Camsari, S. Chowdhury and S.Datta “Scaled Quantum Circuits Emulated with Room Temperature p-Bits,” https://arxiv.org/abs/1810.07144

  • FPGA implementation of p-bits

A.Z.Pervaiz, L.A.Ghantasala, B.M.Sutton and K.Y. Camsari “Weighted p-bits for FPGA implementation of probabilistic circuits,” IEEE Transactions on Neural Networks and Learning Systems,   arxiv.org/abs/1712.04166.

 

OTHER RELATED PUBLICATIONS

RELATED nCORE CENTER

Cite this work

Researchers should cite this work as follows:

  • Supriyo Datta (2018), "p-bits for Probabilistic Spin Logic (PSL): A Brief Introduction," http://nanohub.org/resources/28680.

    BibTex | EndNote

Time

Location

Purdue University, West Lafayette, IN

Tags