Lsd=LG=45nm (each 15 nodes), oxide thickness of 1.2 nm (K=3.9, 5 nodes),
poly-Si gate, junction depth of 10 nm (20 nodes), and all other parameters
at their nominal preset values.
Now, change K to 20, and the oxide thickness to 6 nm, and resimulate the
How do the Id vs. VG and Id vs. VD curves compare? (Hint: You need to go into the 'voltage sweep section' and turn on the Id-Vd sweep.)
The point of the problem is to realize that you can't get the same performance just by increasing the dielectric constant and the thickness--one has to make some other changes as well if you want the same currents from the device.
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