Schred: Exercise 3

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Abstract

This exercise examines the degradation of the total gate capacitance with technology generation due to Maxwell-Boltzmann instead of Fermi-Dirac statistics, quantum-mechanical charge description and depletion of the polysilicon gates.

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NSF

Cite this work

Researchers should cite this work as follows:

  • www.eas.asu.edu/~vasilesk
  • Dragica Vasileska; Gerhard Klimeck (2008), "Schred: Exercise 3," http://nanohub.org/resources/4904.

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Tags

  1. nanoelectronics
  2. MOS capacitors
  3. Capacitance degradation
  4. ACUTE