Illinois ECE 598EP Lecture 1 - Hot Chips: Atoms to Heat Sinks

By Eric Pop

Stanford University

Published on

Abstract

Introduction

Content:

  • The Big Picture
  • Another CPU without a Heat Sink
  • Thermal Management Methods
  • Impact on People and Environment
  • Packaging cost
  • IBM S/390 refrigeration and processor packaging
  • Intel Itanium and Pentium 4packaging
  • Graphics Cards
  • Under/Overclocking
  • Environment
  • A More Detailed Look
  • Thermal Management Methods
  • Where Does the Heat Come From?
  • More on Chip-Level Complexity
  • Temporal, Spatial Variations
  • Variations Depending on Application
  • Temperature Affects
  • Thermal Interconnect Failure
  • Chip-Level Thermal Challenges
  • Why (down)Scaling?
  • CMOS Power Issue: Active vs. Passive
  • Power and Heat Limit Frequency Scaling
  • Has This Ever Happened Before?
  • Implications for Nanoscale Circuits
  • Transistor-Level Thermal Challenges
  • The Tiny Picture
  • K of Nano, RB of Interfaces
  • Thermal Resistance at Device Level
  • Thermal Resistance, Electrical Resistance
  • This Heating Business is Not All Bad…
  • Nanotubes in the Carbon World
  • Why Carbon Nanotubes and Graphene?
  • Light Emission from Metallic SWNTs
  • Extracting SWNT Thermal Conductivity
  • What Is Phase-Change Memory?
  • How Phase-Change Materials Works
  • Samsung 512 Mb PCM Prototype
  • Intel/ST Phase-Change Memory Wafer

Credits

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Cite this work

Researchers should cite this work as follows:

  • Eric Pop (2009), "Illinois ECE 598EP Lecture 1 - Hot Chips: Atoms to Heat Sinks," http://nanohub.org/resources/6184.

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