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KP Nanowire/UTB FET

By Mincheol Shin

KAIST, Daejeon, Korea

Simulate Nanowire/UTB FETs Using KP method

Launch Tool

This tool version is unpublished and cannot be run. If you would like to have this version staged, you can put a request through HUB Support.

Archive Version 1.0
Published on 13 Apr 2009, unpublished on 30 Sep 2009
Latest version: 1.0.3. All versions

doi:10.4231/D32804Z2P cite this

This tool is closed source.

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Abstract

This tool simulates Si PMOS nanowire FETs, based on 6×6 KP method. Ballistic transport is assumed and coupled mode-space transformation is used.

Together with the nanowireMG tool which was developed by the same author, one can simulate both NMOS and PMOS nanowire FETs. The two tools will be eventually merged into one tool.

In a near future, this tool will be extended to simulate ultra-thin-body (UTB) structures, III-V MOSFETs (8×8 KP method will be used for these; Band-to-Band tunneling effect will be considered), and devices with Schottky barrier contacts.

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