KP Nanowire/UTB FET

Simulate Nanowire/UTB FETs Using KP method

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Archive Version 1.0
Published on 13 Apr 2009, unpublished on 30 Sep 2009 All versions

doi:10.4231/D32804Z2P cite this



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This tool simulates Si PMOS nanowire FETs, based on 6x6 KP method. Ballistic transport is assumed and coupled mode-space transformation is used. Together with the nanowireMG tool which was developed by the same author, one can simulate both NMOS and PMOS nanowire FETs. The two tools will be eventually merged into one tool. In a near future, this tool will be extended to simulate ultra-thin-body (UTB) structures, III-V MOSFETs (8x8 KP method will be used for these; Band-to-Band tunneling effect will be considered), and devices with Schottky barrier contacts.


A related paper will be submitted soon.

Cite this work

Researchers should cite this work as follows:

  • A related paper will be submitted soon.
  • Mincheol Shin (2014), "KP Nanowire/UTB FET," (DOI: 10.4231/D32804Z2P).

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