Illinois ECE 498AL: Programming Massively Parallel Processors, Lecture 9: Memory Hardware in G80

By Wen-Mei W Hwu

University of Illinois at Urbana-Champaign

Published on

Abstract

Memory Hardware in G80

Topics:

  • CUDA Device Memory Space
  • Parallel Memory Sharing
  • SM Memory Architecture
  • SM Register File
  • Programmer view of Register File
  • Matrix Multiplication Example
  • More on Dynamic Partitioning
  • ILP vs. TLP
  • Memory Layout of a Matrix in C
  • Constants
  • Shared Memory
  • Parallel Memory Architecture

Credits

These lecture were breezed by Carl Pearson and Daniel Borup and then reviewed, edited ,and Uploaded by Omar Sobh.

Sponsored by

NCN@illinois

Cite this work

Researchers should cite this work as follows:

  • Wen-Mei W Hwu (2009), "Illinois ECE 498AL: Programming Massively Parallel Processors, Lecture 9: Memory Hardware in G80," http://nanohub.org/resources/7277.

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