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C-V (or capacitance-voltage) profiling refers to a technique used for the characterization of semiconductor materials and devices. C-V testing is often used during the characterization process to determine semiconductor parameters, particularly in MOSCAP and MOSFET structures.
C-V measurements can reveal oxide thickness, oxide charges, contamination from mobile ions, and interface trap density in wafer processes. In this image the C-V profile for a bulk p-type substrate MOSCAP with different oxide thickness is shown. The blue curve shown refers to a high frequency C-V profile while the red curve refers to low frequency C-V profile. MOS capacitance is independent of all the frequencies in the accumulation and depletion region. This is because it is here that the total charge is governed by majority carriers. In the inversion region the charge is governed by minority carriers, which forms the inversion layer. Due to finite minority carrier generation time, total charge is not able to follow the gate bias at higher frequencies, which can lead to differences in C-V profiles. Also worth noting here is the shift in threshold voltage with different oxide thickness.
Permitting reuse under the Creative Commons Attribution-Sharealike 3.0 Unported License (CC-BY-SA)
Researchers should cite this work as follows:
Saumitra Raj Mehrotra; Gerhard Klimeck (2010), "CV profile with different oxide thickness," https://nanohub.org/resources/8818.