nanoHUB.org

This resource has a 9.5 Ranking

Ranking is calculated from a formula comprised of user reviews and usage statistics. Learn more ›

Usage Stats
Total: updated 01 Jan, 2010
Users:	1056

Reviews & Citations
Google/IEEE
Avg. Review:	5.0 out of 5 stars
Citations:	0

4 review(s) (Review this)

0 citations

Optimization of Transistor Design for Carbon Nanotubes

By Jing Guo

University of Florida

We have developed a self-consistent atomistic simulator for CNTFETs. Using the simulator, we show that a recently reported high-performance CNTFET delivers a near ballistic on-current. The off-state, however, is significantly degraded because the …

View Presentation (SWF)

Abstract	We have developed a self-consistent atomistic simulator for CNTFETs. Using the simulator, we show that a recently reported high-performance CNTFET delivers a near ballistic on-current. The off-state, however, is significantly degraded because the CNTFET operates like a non-conventional Schottky barrier transistor. Design optimization for significantly improving the off-state is explored. We have also assessed how the CNTFET compares to the state-of-the-art Si MOSFET and the potential of CNTFETs for high-frequency applications.
Cite this work	Researchers should cite this work as follows: Jing Guo (2006), "Optimization of Transistor Design for Carbon Nanotubes," http://nanohub.org/resources/970. BibTex \| EndNote
Time	January 20, 2006
Tags	ballistic mosfet carbon nanotubes devices nanoelectronics nanotransistors research seminar

Navigation

Support

Trouble Report

Optimization of Transistor Design for Carbon Nanotubes

See also

Supporting Documents

Get Help

Get Involved

Legal