Support

Support Options

Submit a Support Ticket

 
You are here: HomeResourcesOnline PresentationsOptimization of Transistor Design for Carbon NanotubesAbout

Optimization of Transistor Design for Carbon Nanotubes

By Jing Guo

University of Florida

See also

No results found.

Category Online Presentations
Abstract We have developed a self-consistent atomistic simulator for CNTFETs. Using the simulator, we show that a recently reported high-performance CNTFET delivers a near ballistic on-current. The off-state, however, is significantly degraded because the CNTFET operates like a non-conventional Schottky barrier transistor. Design optimization for significantly improving the off-state is explored. We have also assessed how the CNTFET compares to the state-of-the-art Si MOSFET and the potential of CNTFETs for high-frequency applications.
Cite this work

Researchers should cite this work as follows:

  • Jing Guo (2006), "Optimization of Transistor Design for Carbon Nanotubes," http://nanohub.org/resources/970.

    BibTex | EndNote

Time January 20, 2006
Tags
  1. ballistic MOSFET
  2. carbon nanotubes
  3. devices
  4. nanoelectronics
  5. nanotransistors
  6. research seminar

nanoHUB.org, a resource for nanoscience and nanotechnology, is supported by the National Science Foundation and other funding agencies.