Graphene Switch Box

By Sansiri Tanachutiwat1, wei wang2

1. College of Nanoscale Science and Engineering, University at Albany, Albany, NY, USA 2. CNSE, University at Albany

Graphene Switch Box for FPGA Interconnects

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Version 1.0w - published on 17 Mar 2015

doi:10.4231/D3599Z28J cite this

This tool is closed source.

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Usage

World usage

Location of all "Graphene Switch Box" Users Since Its Posting

Simulation Users

57

6 7 9 10 12 14 16 17 19 22 23 25 26 26 27 27 28 28 29 31 32 32 33 33 33 33 33 34 35 35 35 35 36 37 37 37 37 38 43 44 46 47 47 48 48 49 49 49 49 49 49 51 52 52 52 53 53 53 54 54 54 55 55 55 55 55 55 55 55 57 57 57 57 57

Users By Organization Type
Type Users
Educational - University 46 (80.7%)
Unidentified 10 (17.54%)
Industry 1 (1.75%)
Users by Country of Residence
Country Users
us UNITED STATES 38 (80.85%)
ir IRAN, ISLAMIC REPUBLIC OF 5 (10.64%)
in INDIA 2 (4.26%)
cn CHINA 1 (2.13%)
bd BANGLADESH 1 (2.13%)

Simulation Runs

137

52 53 58 60 64 77 81 84 86 94 95 106 107 107 112 112 113 113 115 121 122 122 124 124 125 125 125 127 132 132 132 132 133 134 134 134 134 98 109 110 112 114 114 115 115 119 119 119 119 119 119 121 123 124 124 128 128 128 129 129 129 131 131 131 131 131 131 131 131 137 137 137 137 137
Overview
Average Total
Wall Clock Time 3.3 hours 8.67 days
CPU time 1.24 seconds 1.3 minutes
Interaction Time 10.11 minutes 10.61 hours