JFETlab: An Online Simulation Tool for Double Gate Symmetrical JFETs

By Nikolaos Makris1, Matthias Bucher1, Farzan Jazaeri2

1. School of Electrical and Computer Engineering (ECE) of the Technical University of Crete (TUC) 2. EPFL

Online eudcational tool for simulation of electrical characteristics of Junction Field Effect Transistors (JFETs)

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Version 1.0.11 - published on 06 Jul 2018

doi:10.4231/D3154DR4F cite this

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    SCREENSHOT #1 Output Characteristcs Transfer Characteristics SCREENSHOT #4 Output Options

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Abstract

N. Makris1, M. Bucher1, F. Jazaeri2 and J.-M. Sallese2

1Technical University of Crete, 73100  Chania, Greece

2EPFL, 1015 Lausanne, Switzerland

JFETLab evaluates electrical characteristics of a DG symmetrical Junction FET (JFET). The model is physics based and relies only on the structural parameters of the JFET and the electrical constants of the semiconductor. It incorporates the long channel charge based equations introduced in [1], [2] and [3].
The model utilizes Drift-Diffusion transport to evaluate the current (and trans-conductances), and Ward-Dutton (WD) partitioning scheme for evaluating total node charges and trans-capacitances. The model is continuous from below to above threshold and from linear to saturation modes and conserves symmetry among source and drain. The model ensures charge conservation in transient simulation as a result of the modelling of total node charges. The model has been validated with TCAD simulations [1]-[3] and measured devices [3]. The model is capable of addressing silicon devices (default) as well as wide bandgap semiconductors, such as Silicon Carbide (SiC) and Gallium Nitride (GaN) [4]. The tool is implemented in Octave.

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 Transfer Characteristics (semilog current)
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Electronics Laboratory

School of Electrical and Computer Engineering (ECE)

Technical University of Crete (TUC)

73100 Chania, Greece

www.electronics.tuc.gr

References

[1] N. Makris, F. Jazaeri, J. M. Sallese, R. K. Sharma and M. Bucher, "Charge-Based Modeling of Long-Channel Symmetric Double-Gate Junction FETs—Part I: Drain Current and Transconductances," in IEEE Transactions on Electron Devices, vol. 65, no. 7, pp. 2744-2750, July 2018. doi: 10.1109/TED.2018.2838101
[2] N. Makris, F. Jazaeri, J. M. Sallese and M. Bucher, "Charge-Based Modeling of Long-Channel Symmetric Double-Gate Junction FETs—Part II: Total Charges and Transcapacitances," in IEEE Transactions on Electron Devices, vol. 65, no. 7, pp. 2751-2756, July 2018. doi: 10.1109/TED.2018.2838090
[3] N. Makris, M. Bucher, F. Jazaeri and J. M. Sallese, "A Compact Model for Static and Dynamic Operation of Symmetric Double-Gate Junction FETs," in European Solid State Device Research Conference (ESSDERC), Dresden, Germany, September 3-6, 2018.
[4] N. Makris, M. Bucher, K. Zekentes, "High Temperature Modeling of SiC and GaN JFETs," in European Conference on Silicon Carbide and Related Materials (ECSCRM), Birmingham, UK, September 2-6, 2018.

Cite this work

Researchers should cite this work as follows:

  • Nikolaos Makris; Matthias Bucher; Farzan Jazaeri (2018), "JFETlab: An Online Simulation Tool for Double Gate Symmetrical JFETs," http://nanohub.org/resources/jfetlab. (DOI: 10.4231/D3154DR4F).

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