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Intro to MOS-Capacitor Tool

By Emmanuel Jose Ochoa1, Stella Quinones1

1. University of Texas at El Paso

Understanding the effect of silicon doping, oxide (SiO2) thickness, gate type (n+poly/p+poly), and semiconductor type (n-type/p-type) on the flatband voltage, threshold voltage, surface potential and oxide voltage of a MOS-Capacitor.

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Version 1.5 - published on 11 Aug 2014

doi:10.4231/D3BG2HB3Z cite this

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132 151 171 179 190 197 210 222 233 280 350 375 447 460 468 471 471
Average Total
Wall Clock Time 4.94 hours 45.66 days
CPU time 7.27 seconds 26.9 minutes
Interaction Time 25.59 minutes 3.94 days, a resource for nanoscience and nanotechnology, is supported by the National Science Foundation and other funding agencies. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.