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Intro to MOS-Capacitor Tool

By Emmanuel Jose Ochoa1, Stella Quinones1

1. University of Texas at El Paso

Understanding the effect of silicon doping, oxide (SiO2) thickness, gate type (n+poly/p+poly), and semiconductor type (n-type/p-type) on the flatband voltage, threshold voltage, surface potential and oxide voltage of a MOS-Capacitor.

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Version 1.5 - published on 11 Aug 2014

doi:10.4231/D3BG2HB3Z cite this

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Usage

World usage

Location of all "Intro to MOS-Capacitor Tool" Users Since Its Posting

Simulation Users

101

7 16 25 31 37 40 46 52 58 69 81 84 93 98 101

Users By Organization Type
Type Users
Educational - University 51 (50.5%)
Unidentified 44 (43.56%)
Industry 4 (3.96%)
Government Agency 1 (0.99%)
National Lab 1 (0.99%)
Users by Country of Residence
Country Users
us UNITED STATES 19 (38.78%)
in INDIA 14 (28.57%)
bd BANGLADESH 3 (6.12%)
es SPAIN 2 (4.08%)
cn CHINA 2 (4.08%)
ru RUSSIAN FEDERATION 2 (4.08%)
eg EGYPT 2 (4.08%)
il ISRAEL 2 (4.08%)
sg SINGAPORE 2 (4.08%)
au AUSTRALIA 1 (2.04%)

Simulation Runs

466

132 151 171 179 190 197 210 222 233 280 350 375 447 460 466
Overview
Average Total
Wall Clock Time 4.97 hours 45.59 days
CPU time 7.28 seconds 26.7 minutes
Interaction Time 25.76 minutes 3.94 days

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