Intro to MOS-Capacitor Tool

By Emmanuel Jose Ochoa1, Stella Quinones1

1. University of Texas at El Paso

Understanding the effect of silicon doping, oxide (SiO2) thickness, gate type (n+poly/p+poly), and semiconductor type (n-type/p-type) on the flatband voltage, threshold voltage, surface potential and oxide voltage of a MOS-Capacitor.

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Version 1.5 - published on 11 Aug 2014

doi:10.4231/D3BG2HB3Z cite this

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Usage

World usage

Location of all "Intro to MOS-Capacitor Tool" Users Since Its Posting

Simulation Users

284

7 16 23 29 35 38 44 50 56 67 79 82 91 96 100 102 108 116 123 136 140 145 158 160 163 166 169 174 182 184 192 197 205 211 214 216 219 229 232 241 246 251 258 264 267 274 277 282 284

Users By Organization Type
Type Users
Unidentified 179 (63.03%)
Educational - University 96 (33.8%)
Industry 6 (2.11%)
National Lab 2 (0.7%)
Government Agency 1 (0.35%)
Users by Country of Residence
Country Users
us UNITED STATES 31 (36.47%)
in INDIA 29 (34.12%)
cn CHINA 4 (4.71%)
eg EGYPT 4 (4.71%)
br BRAZIL 3 (3.53%)
il ISRAEL 3 (3.53%)
bd BANGLADESH 3 (3.53%)
es SPAIN 3 (3.53%)
ru RUSSIAN FEDERATION 3 (3.53%)
au AUSTRALIA 2 (2.35%)

Simulation Runs

1,131

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Overview
Average Total
Wall Clock Time 3.67 hours 91.17 days
CPU time 6.01 seconds 59.67 minutes
Interaction Time 1.13 hours 28.13 days