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Intro to MOS-Capacitor Tool

By Emmanuel Jose Ochoa1, Stella Quinones1

1. University of Texas at El Paso

Understanding the effect of silicon doping, oxide (SiO2) thickness, gate type (n+poly/p+poly), and semiconductor type (n-type/p-type) on the flatband voltage, threshold voltage, surface potential and oxide voltage of a MOS-Capacitor.

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Version 1.5 - published on 11 Aug 2014

doi:10.4231/D3BG2HB3Z cite this

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World usage

Location of all "Intro to MOS-Capacitor Tool" Users Since Its Posting

Simulation Users

97

7 16 25 31 37 40 46 52 58 69 81 84 93 97

Users By Organization Type
Type Users
Educational - University 48 (49.48%)
Unidentified 43 (44.33%)
Industry 4 (4.12%)
National Lab 1 (1.03%)
Government Agency 1 (1.03%)
Users by Country of Residence
Country Users
us UNITED STATES 19 (40.43%)
in INDIA 13 (27.66%)
bd BANGLADESH 3 (6.38%)
cn CHINA 2 (4.26%)
sg SINGAPORE 2 (4.26%)
eg EGYPT 2 (4.26%)
ru RUSSIAN FEDERATION 2 (4.26%)
es SPAIN 2 (4.26%)
il ISRAEL 1 (2.13%)
lt LITHUANIA 1 (2.13%)

Simulation Runs

459

132 151 171 179 190 197 210 222 233 280 350 375 447 459
Overview
Average Total
Wall Clock Time 4.91 hours 44.64 days
CPU time 7.29 seconds 26.5 minutes
Interaction Time 25.73 minutes 3.89 days

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