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Schred
SCHRED simulation software calculates the envelope wavefunctions and the corresponding bound-state energies in a typical MOS, SOS and a typical SOI structure.
Citations Non-affiliated (103) | Affiliated (14)
Non-affiliated authors
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P. Vimala; NB Balamurugan (2012), "Quantum Mechanical Compact Modeling Of Symmetric Double-gate MOSFETs Using Variational Approach," Journal of Semiconductors, IOP Publishing, 33, 3: pg. -. (DOI: 10.1088/1674-4926/33/3/034001).
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A. Medury; K. Mercha; R. Ritzenthaler; A. De Keersgieter; T. Chiarella; N. Collaert; N. Bhat; KN Bhat (2012), "Device Scaling Model For Bulk FinFETs," Ultimate Integration on Silicon ULIS), 2012 13th International Conference on: pg. 113-116, IEEE. 978-1-4673-0192-3/12. (DOI: 10.1109/ULIS.2012.6193370 ).
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A. Medury; KN Bhat; N. Bhat (2012), "Threshold Voltage Modeling Under Size Quantization For Ultra-thin Silicon Double-gate Metal-oxide-semiconductor Field-effect Transistor," JOURNAL OF APPLIED PHYSICS, American Institute of Physics, 112, 2: pg. -. (DOI: 10.1063/1.4737779).
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X. Gao; E. Nielsen; RP Muller; RW Young; AG Salinger; NC Bishop; MS Carroll (2012), "The QCAD Framework For Quantum Device Modeling," Computational Electronics IWCE), 2012 15th International Workshop on: pg. 1-4, IEEE. 978-1-4673-0705-5. (DOI: 10.1109/IWCE.2012.6242832).
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L. Brunet; X. Garros; A. Braxaix; A. Subirats; F. Andrieu; O. Weber; P. Scheiblin; M. Rafik; E. Vincent; G. Reimbold (2012), "Impact Of Backside Interface On Hot Carriers Degradation Of Thin Film FDSOI Nmosfets," Reliability Physics Symposium IRPS), 2012 IEEE International: pg. -.
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D.E.E. Rodriguez; A.G.A. Bernal (2012), "Development Of A Bottom-up Compact Model For Intel High-K 45 Nm MOSFET," IAENG Transactions On Engineering Technologies: Lecture Notes in Electrical Engineering, Springer, 170: pg. 123-134. 978-94-007-4785-2. (DOI: 10.1007/978-94-007-4786-9_10).
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P. Vimala; NB Balamurugan (2012), "Modelling The Centroid And Charge Density In Double-gate MOSFETs Including Quantum Effects," International Journal Of Electronics, Taylor & Francis: pg. 1-13. (DOI: 10.1080/00207217.2012.743081 ).
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PS Raja; R.J. Daniel (2012), "Effect Of Gate Dielectric On Threshold Voltage Of Nanoscale MOSFETS," International Journal of Engineering Research and Development, 5, 3: pg. 93-104.
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T. Rudenko; V. Kilchytska; J.-P. Raskin; A. Nazarov; D. Flandre (2011), "Special Features of the Back-Gate Effects in Ultra-Thin Body SOI MOSFETs," Semiconductor-on-insulator Materials For Nanoelectronics Applications, Springer: pg. 323-339. 978-3-642-15867-4. (DOI: 10.1007/978-3-642-15868-1).
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Ming-Jer Chen; Sou-Chi Chang; Shin-Jiun Kuang; Chien-Chih Lee; Wei-Han Lee; Kuan-Hao Cheng; Yi-Hsien Zhan (2011), "Temperature-Dependent Remote-Coulomb-Limited Electron Mobility in n+-Polysilicon Ultrathin Gate Oxide nMOSFETs," IEEE Transactions on Electron Devices, 58, 4: pg. 1038-1044, 02. 0018-9383. (DOI: 10.1109/TED.2011.2107519).
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Ming-Jer Chen; Chien-Chih Lee; Kuan-Hao Cheng (2011), "Hole Effective Masses as a Booster of Self-Consistent Six-Band k*p Simulation in Inversion Layers of pMOSFETs," IEEE Transactions on Electron Devices, 58, 4: pg. 931-937, 02. 0018-9383. (DOI: 10.1109/TED.2011.2105271).
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A. Avila; D. Espejo (2011), "A SPICE-compatible Model For Intel's 45nm High-K MOSFET," Proceedings of the World Congress on Engineering and Computer Science 2011, 2: pg. -. 978-988-19251-7-6.
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T. Rudenko; V. Kilchytska; MK Md Arshad; J.-P. Raskin; A. Nazarov; D. Flandre (2011), "On The MOSFET Threshold Voltage Extraction By Transconductance And Transconductance-to-Current Ratio Change Methods: Part II-Effect Of Drain Voltage," Electron Devices, IEEE Transactions On, IEEE, 58, 12: pg. 4180-4188. (DOI: 10.1109/TED.2011.2168227).
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A.J. Garcia-Loureiro; N. Seoane; M. Aldegunde; R. Valin; Asen Asenov; A. Martinez; K. Kalna (2011), "Implementation Of The Density Gradient Quantum Corrections For 3-D Simulations Of Multigate Nanoscaled Transistors," IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, IEEE, 30, 6: pg. 841-851. (DOI: 10.1109/TCAD.2011.2107990).
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Ferney Chaves; D Jimenez; Jordi Suñé (2010), "Explicit quantum potential and charge model for double-gate MOSFETs," Solid-State Electronics, 54, 5: pg. 530-535, 02. (DOI: 10.1016/j.sse.2010.01.015).
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D. Müller-Sajak; A. Cosceev; C. Brand; K. Hofmann; H. Pfnür (2010), "Preparation and electrical characterization of amorphous BaO, SrO and Ba0.7Sr0.3O as high-k gate dielectrics," Physica Status Solidi C, 7, 2: pg. 316-320, 12. (DOI: 10.1002/pssc.200982477).
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Guang-Xi Hu; Ran Liu; Zhi-Jun Qiu; Ling-Li Wang; Ting-Ao Tang (2010), "Quantum Mechanical Effects on the Threshold Voltage of Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistors," Japanese Journal Of Applied Physics, Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physics, 49, 3: pg. 034001-1-034001-4, 03. 1347-4065. (DOI: 10.1143/JJAP.49.034001).
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Hennessy J. (2010), "High Mobility Germanium MOSFETs: Study of Ozone Surface Passivation and n-type Dopant Channel Implants Combined with ALD Dielectrics," N/A: pg. 1-111, Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 02.
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Gokula Kannan; D. Vasileska (2010), "Schred V2.0 Tool to model MOS capacitors," Computational Electronics IWCE), 2010 14th International Workshop on : pg. -, IEEE, 12. 978-1-4244-9383-8 . (DOI: 10.1109/IWCE.2010.5677977).
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Navid Paydavosi; M. Zargham; Kyle Holland; Curtis Dublanko; Mani Vaidyanathan (2009), "Non-Quasi-Static Effects and the Role of Kinetic Inductance in Ballistic Carbon-Nanotube Transistors," IEEE TRANSACTIONS ON NANOTECHNOLOGY, 9, 4: pg. 449-463, 09. 1536-125X. (DOI: 10.1109/TNANO.2009.2032918).
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S.H. Rasouli; K. Endo; K. Banerjee (2009), "Variability analysis of FinFET-based devices and circuits considering electrical confinement and width quantization," Proceedings Of The 2009 International Conference On Computer-aided Design, ACM: pg. 505-512, ACM, 11. 978-1-60558-800-1. (DOI: 10.1145/1687399.1687495).
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Ma Zhongfa; Zhang Peng; Wu Yong; Li Weihua; Zhuang Yiqi; Du Lei (2009), "A percolation study of RTS noise amplitudes in nano-MOSFETs by Monte Carlo simulation," Microelectronics Reliability, Elsevier, 50, 2: pg. 179-182, 10. 0026-2714. (DOI: 10.1016/j.microrel.2009.09.017).
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I. Knezevic; E. Ramayya; D. Vasileska; Stephen Goodnick (2009), "Diffusive Transport in Quasi-2D and Quasi-1D Electron Systems," Journal of Computational and Theoretical Nanoscience, American Scientific Publishers, 6, 8: pg. 1725-1753, 11. (DOI: http://dx.doi.org/10.1166/jctn.2009.1240).
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Stephen Thomas; T. Whall; E. Parker; D. Leadley; R. Lander; George Vellianitis; J. Watling (2009), "Improved effective mobility extraction in MOSFETs," Solid-State Electronics, Elsevier, 53, 12: pg. 1252-1256, 10. 0038-1101. (DOI: 10.1016/j.sse.2009.09.014).
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Stephen Thomas; T. Whall; E. Parker; D. Leadley; R. Lander; George Vellianitis; J. Watling (2009), "Accurate effective mobility extraction in SOI MOS transistors," Ultimate Integration of Silicon, 2009. ULIS 2009. 10th International Conference on : pg. 31-34, IEEE, 05. 978-1-4244-3704-7 . (DOI: 10.1109/ULIS.2009.4897532 ).
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L. Brunet; X. Garros; F. Andrieu; G. Reimbold; E. Vincent; A. Braxaix; F. Boulanger (2009), "New method to extract interface states density at the Back and the Front gate interfaces of FDSOI transistors from CV-GV measurements," SOI Conference, 2009 IEEE International : pg. 1-2, IEEE, 11. 978-1-4244-4256-0 .
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Guang-Xi Hu; Ran Liu; Ting-Ao Tang; Ling-Li Wang; Zhi-Jun Qiu (2009), "Quantum-mechanical study on the electron effective mobility of surrounding-gate nMOSFETs," Ieee 8th International Conference On Asic, 2009: pg. 792-795, IEEE, 10. 978-1-4244-3868-6. (DOI: 10.1109/ASICON.2009.5351286).
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K. Huet; J. Saint-Martin; A. Bournel; D. Querlioz; P. Dollfus (2009), "Effect of access resistance on apparent mobility reduction in nano-MOSFET," 10th International Conference On Ultimate Integration Of Silicon, 2009: pg. 35-38, IEEE, 03. 978-1-4244-3704-7. (DOI: 10.1109/ULIS.2009.4897533).
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Ishtiaq Ahsan; Dieter Schroder; Edward Nowak; Oleg Gluschenkov; Noah Zamdmer; Ronald Logan (2009), "Impact of intra-die thermal variation on accurate MOSFET gate-length measurement," IEEE/semi Advanced Semiconductor Manufacturing Conference, 2009: pg. 174-177, IEEE, 05. 978-1-4244-3614-9. (DOI: 10.1109/ASMC.2009.5155978).
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A. Ohata; O. Faynot; M. Casse (2008), "Electrical Characteristics Related to Silicon Film Thickness in Advanced FD SOI-MOSFETs," Solid-State Electronics, Elsevier, 52, 1: pg. 126-133, 09. 0038-1101. (DOI: 10.1016/j.sse.2007.07.028).
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Stanislav Markov; Scott Roy; C. Fiegna; E. Sangiorgi; Asen Asenov (2008), "On the Sub-NM EOT Scaling of High-K Gate Stacks," 2008 9th international conference on Ultimate Integration on Silicon : pg. 99-102, 03. 978-1-4244-1729-2. (DOI: 10.1109/ULIS.2008.4527149 ).
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Stanislav Markov; Peter Sushko; Scott Roy; C. Fiegna; E. Sangiorgi; Alexander Shluger; Asen Asenov (2008), "Si-SiO2 interface band-gap transition-effects on MOS inversion layer," physica status solidi a): Trends In Nanotechnology, Wiley Online Library, 205, 6: pg. 1290 -1295, 05. (DOI: 10.1002/pssa.200778154).
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Martin von Haartman; Mikael Ostling (2007), "Effect of channel positioning on the 1/f noise in silicon-on-insulator metal-oxide-semiconductor field-effect transistors," Journal of Applied Physics, American Institute of Physics, 101, 32767: pg. 034506-1-034506-4, 02. (DOI: 10.1063/1.2433772).
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Ralf Granzner; Frank Schwierz; Vladimir Polyakov (2007), "An Analytical Model for the Threshold Voltage Shift Caused by Two-Dimensional Quantum Confinement in Undoped Multiple-Gate MOSFETs," Electron Devices, IEEE Transactions on, IEEE, 54, 9: pg. 2562-2565, 09. 1557-9646. (DOI: 10.1109/TED.2007.902167).
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Leonardo Gomez; Ingvar Aberg; Judy Hoyt (2007), "Electron Transport in Strained-Silicon Directly on Insulator Ultrathin-Body n-MOSFETs with Body Thickness Ranging from 2 - 2 nm," Electron Devices, IEEE Transactions on, IEEE, 28, 4: pg. 285-287, 04. 0741-3106. (DOI: 10.1109/LED.2007.891795).
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N. Barin; Marco Braccioli; C. Fiegna; E. Sangiorgi (2007), "Analysis of Scaling Strategies for Sub-30 nm Double-Gate SOI N-MOSFETs," Nantechnology, IEEE Transactions On, IEEE, 6, 4: pg. 421-430, 07. 1536-125X. (DOI: 10.1109/TNANO.2007.894022).
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B. Nae; O. Moldovan; A. Lazaro; B Iniquez (2007), "A Compact Quantum Model of Nanoscale Double-Gate MOSFET for RF and Noice Simulations," Electron Devices, 2007 Spanish Conference On, Madrid: pg. 355-358, Madrid, 02. 1-4244-0868-7. (DOI: 10.1109/SCED.2007.384067).
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Meng Li; Zhipeng Yu (2007), "Compact Modeling for Inversion Charge in Nanoscale DG-MOSFETs," Journal of Semiconductors, 28, 11: pg. 1717-1721, 11.
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S. Eminente; S. Cristoloveanu; Raphael Clerc; A. Ohata; Gerard Ghibaudo (2007), "Ultra-thin fully-depleted SOI MOSFETs: Special charge properties and coupling effects," Solid-State Electronics, Elsevier, 51, 2: pg. 239-244, 02. (DOI: 10.1016/j.sse.2007.01.016).
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M. Alam; Q. Khosru (2007), "Self-Consistent Modeling of Ultra Thin Body Double Gate MOSFET," Electron Devices And Solid-state Circuits, 2007. Edssc 2007, Iee Eonference On: pg. 601-604, IEEE, 12. 978-1-4244-0637-1. (DOI: 10.1109/EDSSC.2007.4450196).
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Swagata Bhattacherjee; Abhijit Biswas (2007), "Modeling of Threshold Voltage and Subthreshold Slope of Nanoscale DG MOSFETs," Semiconductor Science And Technology, IOP Publishing, 23, 1: pg. -, 12. (DOI: 10.1088/0268-1242/23/1/015010).
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Biswajit Ray; K. Shubhakar; S. Mahapatra (2007), "Necessity for Quantum Mechanical Simulation for the Future Technology Nodes," Physics Of Semiconductor Devices, 2007. IWPSD 2007. International Workshop On: pg. 880-883, 12. 978-1-4244-1728-5. (DOI: 10.1109/IWPSD.2007.4472662).
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Martin von Haartman; Mikael Ostling (2007), "1/f Noise Performance of Advanced CMOS Devices," Low-frequency Noise In Advanced Mos Devices, Analog Circuits And Signal Processing Series, Springer Netherlands: pg. 103-173, 08. 978-1-4020-5909-4 \print) 978-1-4020-5910-0 \onlin. (DOI: 10.1007/978-1-4020-5910-0_4).
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Leonardo Gomez (2007), "Electron Transport in Ultrathin-Body Fully Depleted N-MOSFETs Fabricated on Strained Silicon Directly on Insulator with Body Thickness Ranging from 2NM to 25NM": pg. -, Massachusetts Institute of Technology, 02.
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Wipa Chaisantikulwat; M. Mouis; Gerard Ghibaudo; S. Cristoloveanu; J. Widiez; M. Vinet; S. Deleonibus (2007), "Experimental evidence of mobility enhancement in short-channel ultra-thin body double-gate MOSFETs by magnetoresistance technique," Solid-State Electronics, Elsevier, 51, 11: pg. 1494-1499, 11. (DOI: 10.1016/j.sse.2007.09.017).
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L. Avila; M. Franklin (2006), "Quantum Corrections to Threshold Voltages For Decanano MOSFETs," Final Report, May 2006 To USC--Information Sciences Institute: pg. -, 05.
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A. Ritenour; A. Khakifirooz; D.A. Antoniadis; R.Z. Lei; W. Tsai; A. Dimoulas; G. Mavrou; Y. Panayiotatos (2006), "Subnanometer-equivalent-oxide-thickness germanium p-metal-oxide-semiconductor field effect transistors fabricated using molecular-beam-deposited high-k/metal gate stack," Applied Physics Letters, AIP, 88, 32767: pg. 132107-1-132107-3, 03.
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Martin von Haartman (2006), "Low-frequency noise characterization, evaluation and modeling of advanced Si- and SiGe-based CMOS transistors," Stockholm, Sweden: pg. -, Royal Institute of Technology KTH), Stockholm, Sweden, 03.
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E. Ungersboeck; H. Kosina (2006), "Monte Carlo study of electron transport in strained silicon inversion layers," Journal of Computational Electronics, Springer, 5, 2: pg. 79-83, 07. (DOI: 10.1007/s10825-006-8823-4).
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S. Uno; H. Abebe; E. Cumberbatch (2006), "Analytical Formulae of Quantum-Mechanical Electron Density in Inversion Layer in Planar MOSFETs," IWCM 2006: pg. 25-27, 01.
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S.P.R. Bandi; C. Washburn; P.R. Mukund; J. Kolnik; K. Paradis; S. Howard; J. Burleson (2006), "Effect of gate poly-silicon depletion on MOSFET input impedance," IEEE Microwave And Wireless Components Letters, IEEE, 16, 5: pg. 290-292, 01.
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E. Cumberbatch; S. Uno; H. Abebe (2006), "Nano-scale MOSFET device modelling with quantum mechanical effects," European Journal Of Applied Mathematics, Cambridge Univ Press, 17, 4: pg. 465-489, 11. (DOI: 10.1017/S0956792506006656).
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A. Limon; Hedley Morris (2006), "A multilevel adaptive solver based on second-generation wavelet thresholding techniques," Numerical Linear Algebra With Applications, Wiley Online Library, 13, 2: pg. 251-273, 02. (DOI: 10.1002/nla.479).
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Meng Li; Zhipeng Yu (2006), "Analytical Quantum Modeling of Inversion Charge Density for Nanoscale Undoped Symmetric DG-MOSFETs," Solid-state And Integrated Circuit Technology, 2006, Icsict , Shanghai, China: pg. 1361-1363, IEEE, Shanghai, China, 10. 1-4244-0160-7. (DOI: 10.1109/ICSICT.2006.306183).
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Lixin Ge; F. Gamiz; G. Workman; S. Verraraghavan (2006), "On the gate capacitance limits of nanoscale DG and FD SOI MOSFETs," Electron Devices, IEEE Transactions on, IEEE, 53, 4: pg. 753-758, 04. 0018-9383. (DOI: 10.1109/TED.2006.871412).
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Lihui Wang (2006), "Quantum Mechanical Effects on MOSFET Scaling Limit," IEEE: pg. -, Georgia Institute of Technology, 07.
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Man Wong; Xuejie Shi; Thomas Chow (2006), "On the Body-Thickness Dependence of the Linear Extrapolated Threshold Voltage of a Double-Gate Metal-Oxide-Semicondcutor Field-Effect Device," Japanese Journal Of Applied Physics, 45, 12: pg. 9069-9071, 12. (DOI: 10.1143/JJAP.45.9069).
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D.A. Antoniadis; Ingvar Aberg; C. Ni Chleirigh; O. Nayfeh; A. Khakifirooz; Judy Hoyt (2006), "Continuous MOSFET performance increase with device scaling: The role of strain and channel material innovations," IBM Journal Of Research And Development, IBM, 50, 4: pg. 363-376, 07. 0018-8646.
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Ingvar Aberg (2006), "Transport in Thin-Body MOSFETs Fabricated in Strained Si and Strained Si/SiGe Heterostructures on Insulator": pg. -, Massachusetts Institute of Technology, 03.
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X. Shi; M. Wong (2005), "On the threshold voltage of metal-oxide-semiconductor field-effect transistors," Solid-State Electronics, Elsevier, 49, 7: pg. 1179-1184, 04. (DOI: 10.1016/j.sse.2005.04.010).
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Ingvar Aberg; Judy Hoyt (2005), "Hole transport in UTB MOSFETs in strained-Si directly on insulator with strained-Si thickness less than 5 nm," IEEE ELECTRON DEVICE LETTERS, IEEE, 26, 9: pg. 661-663, 09. (DOI: 10.1109/LED.2005.853648).
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X. Shi; M. Wong (2005), "Effects of substrate doping on the linearly extrapolated threshold voltage of symmetrical DG MOS devices," IEEE Transactions on Electron Devices, IEEE, 52, 7: pg. 1616-1621 , 07. (DOI: 10.1109/TED.2005.850622).
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T.M. Abdolkader; M. Fathi; Wael Fikry; O.A. Omar (2005), "FETMOSS: a software tool for 2D simulation of double-gate MOSFET," Enabling Technologies For The New Knowledge Society: Iti 3rd International Conference On Information And Communications Technology, 2005, Wiley Online Library: pg. 193-208, IEEE, 12. 0-7803-9270-1. (DOI: 10.1109/ITICT.2005.1609624).
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H. Ceric; M. Karner; A. Nentchev; P. Schwaha; E. Ungersboeck; S. Selberherr (2005), "Vista Status Report," Citeseer: pg. 1-29, institute for Microelectronics, Technical University Vienna, 12.
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E. Ungersboeck; H. Kosina (2005), "The Effect of Degeneracy on Electron Transport in Strained Silicon Inversion Layers," Simulation Of Semiconductor Processes And Devices, 2005. SISPAD 2005. International Conference On, Tokyo, Japan: pg. 311-314, IEEE, Tokyo, Japan, 03. 4-9902762-0-5.
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Keunwoo Kim; Hussain Hanafi; Jin Cai; Ching Te Chuang (2005), "Off-State Current and Performance Analysis for Double-Gate CMOS with Non-Self-Aligned Back Gate," Electron Devices, IEEE Transactions on, IEEE, 52, 9: pg. 2104-2107, 09. 0018-9383. (DOI: 10.1109/TED.2005.854292).
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N. Barin; Marco Braccioli; C. Fiegna; E. Sangiorgi (2005), "Scaling the High-Performance Double-Gate SOI MOSFET down to the 32 nm Technology Node with SiO2-based Gate Stacks," Electron Devices Meeting, 2005, IEDM Technical Digest, IEEE International, IEEE: pg. 609-612, IEEE, 12. 0-7803-9268-X. (DOI: 10.1109/IEDM.2005.1609423).
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Isaac Lauer; D.A. Antoniadis (2005), "Enhancement of Electron Mobility in Ultrathin-Body Silicon-on-Insulator MOSFETs with Uniaxial Strain," Electron Device Letters, IEEE, IEEE, 26, 5: pg. 314-316, 05. (DOI: 10.1109/LED.2005.846582).
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Keunwoo Kim; Koushik Das; R.V. Joshi; Ching Te Chuang (2005), "Leakage Power Analysis of 25-nm Double-Gate CMOS Devices and Circuits," Electron Devices, IEEE Transactions on, IEEE, 52, 5: pg. 980-986, 05. (DOI: 10.1109/TED.2005.846317).
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V. Trivedi; Jerry Fossum (2005), "Quantum-mechanical effects of the threshold voltage of undoped double-gate MOSFETs," Electron Device Letters, IEEE, IEEE, 26, 8: pg. 579-582, 08. 0741-3106 . (DOI: 10.1109/LED.2005.852741).
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A. Khakifirooz; O. Nayfeh; D.A. Antoniadis (2005), "Assessing the Performance Limits of Ultra-Thin Double-Gate MOSFETs: Silicon vs. Germanium," SOI Conference, 2004, Proceedings. 2004 IEEE International: pg. 79-80, IEEE, 02. 0-7803-8497-0. (DOI: 10.1109/SOI.2004.1391564).
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Zhang Dawei; Tian Lilin; Yu Zhipeng (2005), "Analytical Modeling of Threshold Voltage for Double-Gate MOSFET Fully Comprising Quantum Mechanical Effects," Journal of Semiconductors, 26, 3: pg. 429-435, 03.
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S. Uno; H. Abebe; E. Cumberbatch (2005), "Analytical Solutions to Quantum Drift-Diffusion Equations for Quantum Mechanical Modeling of MOS Structures," 2005 International Conference on Solid State Devices and Materials: pg. 592-593, 09.
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Shaikh Ahmed; D. Vasileska; C. Heitzinger; Christian Ringhofer (2005), "Quantum Potential Approach to Modeling Nanoscale MOSFETs," Journal of Computational Electronics, Springer, 4, 1: pg. 57-61, 08. (DOI: 10.1007/s10825-005-7107-8).
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Shaikh Ahmed (2005), "Modeling Quantum and Coulomb Effects in Nanoscale Devices": pg. -, ARIZONA STATE UNIVERSITY, 05.
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D. Vasileska; H Khan; Shaikh Ahmed; Christian Ringhofer; C. Heitzinger (2005), "Quantum and Coulomb effects in nanodevices," International Journal Of Nanoscience, 4, 3: pg. 305-361, 04.
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Daewon Ha; H. Takeuchi; Yang-Kyu Choi; Tsu-Jae King; W.P. Bai; D.-L. Kwong; A. Agarwal; M. Ameen (2004), "Molybdenum gate HfO2 CMOS FinFET technology," Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International: pg. 643-646, IEEE, 12. 0-7803-8684-1 . (DOI: 10.1109/IEDM.2004.1419248 ).
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J.M. Mohaidat; Riyad Ahmad-Bitar (2004), "Parameters affecting the accuracy of oxide thickness prediction in thin metal-oxide-semiconductor structures," Superlattices And Microstructures, Elsevier, 35, 1: pg. 85-94, 02. (DOI: 10.1016/j.spmi.2004.02.018).
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Daewon Ha; H. Takeuchi; Yang-Kyu Choi; Tsu-Jae King (2004), "Molybdenum gate technology for ultrathin-body MOSFETs and FinFETs," IEEE Transactions on Electron Devices, IEEE, 51, 12: pg. 1989-1996, 12. 0018-9383. (DOI: 10.1109/TED.2004.839752).
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A. Khakifirooz; D.A. Antoniadis (2004), "On the electron mobility in ultrathin SOI and GOI," IEEE ELECTRON DEVICE LETTERS, IEEE, 25, 2: pg. 80-82, 02. 0741-3106. (DOI: 10.1109/LED.2003.822650).
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Y. Yu; S. Kim; B. Choi; S. Hong; S. Hwang; D. Ahn (2004), "SPICE-Compatible Floating-Dot Single-Electron Memory Model with a New Description of SOI MOSFETs Including Quantum-Mechanical Effects," Journal Of Korean Physcal Society, Korean Physical Society; 1999, 44, 1: pg. 117-120, 01.
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Jerry Fossum; Lixin Ge; M.-H. Chiang; V. Trivedi; M. Chowdhury; L. Mathew; G. Workman; B.-Y. Nguyen (2004), "A process/physics-based compact model for nonclassical SMOS device and circuit design," Solid-State Electronics, Elsevier, 48, 6: pg. 919-926, 06. (DOI: 10.1016/J.sse.2003.12.030).
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V. Trivedi; Jerry Fossum; F. Gamiz (2004), "A Compact QM-Based Mobility Model for Nanoscale Ultra-Thin-Body CMOS Devices," Electron Devices Meeting, 2004, IEDM Technical Digest, IEEE International: pg. 763-766, IEEE, 12. 0-7803-8684-1. (DOI: 10.1109/IEDM.2004.1419284).
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Ting-Wei Tang; Terrance O'Regan; Bo Wu (2004), "Thomas-Fermi Approximation for a Two-Dimensional Electron Gas at Low Temperatures," Journal of Applied Physics, AIP, 95, 12: pg. 7990-7997, 06. (DOI: 10.1063/1.1739292).
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Yang-Kyu Choi (2004), "FinFet for Terabit Era," Journal Of Semiconductor Technolgoy And Science, ???????, 4, 1: pg. 1-11, 03.
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T.M. Abdolkader; Wael Fikry (2004), "Semi-Empirical quantum correction model for electron concentration in symmetric double gate mosfets," 2004 International Conference on Electrical, Electronic and Computer Engineering ICEEC?O4: pg. 549-552, IEEE, 09. 0-7803-8575-6 . (DOI: 10.1109/ICEEC.2004.1374527 ).
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Lixin Ge; Jerry Fossum; Francisco Gámiz (2003), "Mobility Enhancement via Volume Inversion in Double-Gate MOSFETs," SOI Conference, 2003, IEEE International, Newport Beach, California: pg. 153-154, IEEE, Newport Beach, California, 10. 0-7803-7815-6 / 1078-621X. (DOI: 10.1109/SOI.2003.1242934 ).
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T. Krishnamohan; C. Jungemann; K. Saraswat (2003), "A Novel, Very High Performance, Sub-20nm Depletion-Mode Double-Gate DMDG) Si/Si/subx/Ge/sub 1-x)//Si Channel PMOSFET," Electron Devices Meeting, 2003, IEDM : pg. 29.3.1-29.3.4, 12. 0-7803-7872-5. (DOI: 10.1109/IEDM.2003.1269373).
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Abhijeet Paul; S. Mehrotra; G Klimeck; M. Rodwell (2011), "Performance Enhancement Of GaAs UTB PFETs By Strain, Orientation And Body Thickness Engineering," Device Research Conference DRC), 2011 69th Annual : pg. 233-234, IEEE. 978-1-61284-243-1 . (DOI: 10.1109/DRC.2011.5994511).
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Saibal Mukhopadhyay; Keunwoo Kim; J.-J. Kim; S.-H. Lo; R.V. Joshi; Ching Te Chuang; K. Roy (2005), "Modeling and analysis of gate leakage in ultra-thin oxide sub-50nm double gate devices and circuits.," Sixth International Symposium On Quality Of Electronic Design, 2005. Isqed 2005: pg. 410-415, IEEE, 03. 0-7695-2301-3 . (DOI: 10.1109/ISQED.2005.77 ).
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