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HomeResourcesToolsOn-Chip Thermoelectric Cooling Tool › Usage

On-Chip Thermoelectric Cooling Tool

By David Alberto Saenz1, Shuaib Salamat2

1. University of Texas at El Paso 2. Purdue University

Simulates a peltier cooler embedded on a chip casing and it's thermal profile.

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Version 1.0 - published on 29 Mar 2011

doi:10.4231/D3445HC2R cite this

Open source: license | code unavaialble

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Usage

World usage

Location of all "On-Chip Thermoelectric Cooling Tool" Users Since Its Posting

Simulation Users

49

4 9 12 15 16 17 19 19 20 21 21 23 23 24 25 26 30 33 36 37 42 43 45 45 49 49 49

Users By Organization Type
Type Users
Educational - University 40 (81.63%)
Unidentified 5 (10.2%)
Industry 3 (6.12%)
National Lab 1 (2.04%)
Users by Country of Residence
Country Users
us UNITED STATES 28 (71.79%)
kr KOREA, REPUBLIC OF 2 (5.13%)
de GERMANY 2 (5.13%)
eg EGYPT 1 (2.56%)
au AUSTRALIA 1 (2.56%)
iq IRAQ 1 (2.56%)
bd BANGLADESH 1 (2.56%)
mx MEXICO 1 (2.56%)
co COLOMBIA 1 (2.56%)
dz ALGERIA 1 (2.56%)

Simulation Runs

480

19 33 42 55 60 68 78 80 86 92 95 98 99 104 121 123 131 135 301 302 418 456 459 460 473 480 480
Overview
Average Total
Wall Clock Time 1.46 hours 21.07 days
CPU time 1.68 seconds 9.71 minutes
Interaction Time 13.24 minutes 3.19 days

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