VALint: the NEEDS Verilog-A Checker (BETA)

By Xufeng Wang1, Geoffrey Coram2, Colin McAndrew3

1. Purdue University 2. Analog Devices, Inc. 3. Freescale Semiconductor

Verilog-A lint and pretty printer created by NEEDS

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Version 1.0.0 - published on 31 Mar 2017

doi:10.4231/D3HX15S0V cite this

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Versions

Version Released DOI Handle Published
1.0.0 31 Mar 2017 doi:10.4231/D3HX15S0V yes
0.3.1 17 May 2016 doi:10.4231/D35Q4RN1J no
0.3 18 Apr 2016 doi:10.4231/D3154DQ3H no
0.2 09 Oct 2015 doi:10.4231/D3G44HR7T no
0.1 10 Sep 2015 doi:10.4231/D35T3G148 no