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Tags: Circuit Simulation

Resources (1-2 of 2)

  1. 7nm Si FinFET Models with Symmetric and Asymmetric Underlap for Circuit Simulations

    23 Aug 2013 | Downloads | Contributor(s): Arun Goud Akkala, Sumeet Kumar Gupta, Sri Harsha Choday, Kaushik Roy

    This tarball contains Verilog-A compact lookup table models for 7nm channel length Si FinFET with different underlaps which can be used in HSPICE netlists for circuit simulations....

    http://nanohub.org/resources/19195

  2. SPICE Model of Graphene Nanoribbon FETs

    12 Jul 2013 | Downloads | Contributor(s): Ying-Yu Chen, Morteza Gholipour, Artem Rogachev, Amit Sangai, Deming Chen

    Graphene Nano-Ribbons Field-Effect Transistors HSPICE implementation based on the following two publications: [1] Y-Y. Chen, A. Rogachev, A. Sangai, G. Iannaccone, G. Fiori, and D. Chen (2013)....

    http://nanohub.org/resources/17074

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