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Tags: Circuit Simulation

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  1. Hao Zhuang

    http://nanohub.org/members/105541

  2. Models for SETs in PSpice

    Closed | Responses: 0

      Hello. I am trying to simulate hybrid circuits (cMOS SET transistors) and I can't find models for SET, anywhere... I only want a SET that can simulate properly along with regular...

    http://nanohub.org/answers/question/1399

  3. 7nm Si FinFET Models with Symmetric and Asymmetric Underlap for Circuit Simulations

    23 Aug 2013 | Downloads | Contributor(s): Arun Goud Akkala, Sumeet Kumar Gupta, Sri Harsha Choday, Kaushik Roy

    This tarball contains Verilog-A compact lookup table models for 7nm channel length Si FinFET with different underlaps which can be used in HSPICE netlists for circuit simulations....

    http://nanohub.org/resources/19195

  4. SPICE Model of Graphene Nanoribbon FETs

    12 Jul 2013 | Downloads | Contributor(s): Ying-Yu Chen, Morteza Gholipour, Artem Rogachev, Amit Sangai, Deming Chen

    Graphene Nano-Ribbons Field-Effect Transistors HSPICE implementation based on the following two publications: [1] Y-Y. Chen, A. Rogachev, A. Sangai, G. Iannaccone, G. Fiori, and D. Chen (2013)....

    http://nanohub.org/resources/17074

  5. Hamed Fooladvand

    M.Sc NANOElectonics Engineering - University of Tabriz, Iran / B.Sc Power Electrical Engineering - Ardabil, Iran

    http://nanohub.org/members/74481

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