Find information on common issues.
Ask questions and find answers from other users.
Suggest a new site feature or improvement.
Check on status of your tickets.
A Phase-Changing Oxide for PS Silicon Photonics
03 Nov 2016 | | Contributor(s):: Richard Haglund
Abdurrahman Javid Shaikh
Advanced CMOS Device Physics for 7 nm and Beyond
16 Dec 2015 | | Contributor(s):: Scott Thompson
This presentation is part of 2015 IEDM tutorials The industry march along Moore's Law continues and new semiconductor nodes at 7 and beyond will certainly happen. However, many device, material, and economical challenges remain. This tutorial will target understanding key device concepts for...
Carbon-Based Nanoswitch Logic
28 Mar 2013 | | Contributor(s):: Stephen A. Campbell
This talk discusses a rather surprising possibility: the use of carbon-based materials such as carbon nanotubes and grapheneto make nanomechanical switches with at least an order of magnitude lower power dissipation than the low power CMOS options and performance between the various CMOS...
Computational and Experimental Study of Transport in Advanced Silicon Devices
28 Jun 2013 | | Contributor(s):: Farzin Assad
In this thesis, we study electron transport in advanced silicon devices by focusing on the two most important classes of devices: the bipolar junction transistor (BJT) and the MOSFET. In regards to the BJT, we will compare and assess the solutions of a physically detailed microscopic model to...
Device Options and Trade-offs for 5 nm CMOS Technology Seminar Series
05 Oct 2015 | | Contributor(s):: Mark Lundstrom
Today's CMOS technology is so-called 14-nm technology. 10 nm technology development is well underway, and 7 nm has begun. It will soon be time to select a technology for the 5 nm node. To help understand the device options, what each on promises, what the challenges and trade-offs are,...
ECE 612 Lecture 18A: CMOS Process Steps
out of 5 stars
12 Nov 2008 | | Contributor(s):: Mark Lundstrom
Outline: 1) Unit Process Operations,2) Process Variations.
ECE 612 Lecture 18B: CMOS Process Flow
18 Nov 2008 | | Contributor(s):: Mark Lundstrom
For a basic, CMOS process flow for an STI (shallow trench isolation process), see: http://www.rit.edu/~lffeee/AdvCmos2003.pdf.This lecture is a condensed version of the more complete presentation (listed above) by Dr. Fuller.
ECE 612 Lecture 22: CMOS Circuit Essentials
24 Nov 2008 | | Contributor(s):: Mark Lundstrom
Outline: 1) The CMOS inverter,2) Speed,3) Power,4) Circuit performance,5) Metrics,6) Limits.This lecture is an overview of CMOS circuits. For a more detailed presentation, the following lectures from the Fall 2006 teaching of this course should be viewed:Lecture 24: CMOS Circuits, Part I (Fall...
ECE 612 Lecture 23: RF CMOS
02 Dec 2008 | | Contributor(s):: Mark Lundstrom
Outline: 1) Introduction,2) Small signal model,3) Transconductance,4) Self-gain,5) Gain bandwidth product,6) Unity power gain,7) Noise, mismatch, linearity…,8) Examples
Emerging CMOS Technology at 5 nm and Beyond: Device Options and Trade-offs
14 Dec 2015 | | Contributor(s):: Mark Lundstrom, Xingshu Sun, Dimitri Antoniadis, Shaloo Rakheja
Device Options and Trade-offs
Green Light on Germanium
02 Nov 2015 | | Contributor(s):: peide ye
This talk will review recent progress as well as challenges on Ge research for future logic applications with emphasis on the breakthrough work at Purdue University on Ge nFET which leads to the demonstration of the world first Ge CMOS circuits on Si substrates. Ge device technology includes...
In Search of a Better MEMS-Switch: An Elementary theory of how nanostructured dielectrics may soften landing, increase travel range, and decrease energy dissipation
06 Jun 2012 | | Contributor(s):: Muhammad Alam
In this talk, I will discuss an elementary theory of the role of nanostructured electrodes in addressing some of the challenges from a fundamentally different perspective. The goal is to start a conversation regarding the viability of the approaches suggested and see if the perspective offered...
Ivan C R nascimento