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A UCSD analytic TFET model
18 Dec 2015 | | Contributor(s):: Jianzhi Wu, Yuan Taur
A continuous, analytic I-V model is developed for double-gate and nanowire tunnel FETs with 3D density of states, including depletion in the source. At the core of the model is a gate-controlled channel potential that satisfies the source and drain boundary conditions. Verified by...
Stanford Virtual-Source Carbon Nanotube Field-Effect Transistors Model
08 Apr 2015 | Compact Models | Contributor(s):
By Chi-Shuen Lee1, H.-S. Philip Wong1
The VSCNFET model captures the dimensional scaling properties and includes parasitic resistance, capacitance, and tunneling leakage currents. The model aims for CNFET technology assessment for the...
Praveen C S
Course on Beyond CMOS Computing
06 Jun 2013 | | Contributor(s):: Dmitri Nikonov
Complementary metal-oxide-semiconductor (CMOS) field effect transistors (FET) underpinned the development of electronics and information technology for the last 30 years. In an amazing saga of development, the semiconductor industry (with a leading role of Intel) has shrunk the size of these...