Questions & Answers (1-3 of 3)

  1. i modeled CNTFET in “CNTFET Lab”, but it is showing “not converging at 100”. How can i rectify this?

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  2. why the tool is not working for negetive gate and drain bias?

    Closed | Responses: 0

    I tried to simulate for the I~V curves of planar CNTFET with negative gate and drain bias (basically a p-type FET), but it shows some error message. As indicated by the simulator we can use a...


  3. while running simulation “execute idle at…….”

    Closed | Responses: 0

    Hai, While running the CNTFET simulations with the CNTFETLab, I am getting the executing information as

    “execute Idle at UFlorida-HPC…….” for a long time…I want...