Tags: compact modeling

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  1. MIT TFET compact model including the impacts of non-idealities

    03 May 2017 | Compact Models | Contributor(s):

    By Redwan Noor Sajjad1, Ujwal Radhakrishna2, Dimitri Antoniadis1

    1. Massachusetts Institute of Technology 2. Massachusetts Institute of Technology (MIT)

    We present a physics based compact model for Tunnel Field Effect Transistor (TFET), MIT TFET compact model, that captures the device physics of TFETs including non-idealities such as the interface...


  2. Formulating ModSpec or: what is a device, exactly?

    27 Mar 2017 | Presentation Materials | Contributor(s): Karthik Aadithya, Archit Gupta, A. Gokcen Mahmutoglu, Jaijeet Roychowdhury, Tianshi Wang, Bichen Wu

    ModSpec is a mathematically-based, multi-physics format for describing devices and their interaction with networks. This document details the "derivation" of the ModSpec format,...


  3. ModSpec: an Open, Universal, Low-Level Model API: Proposal for designation as a CMC-approved standard

    27 Mar 2017 | Presentation Materials | Contributor(s): Jaijeet Roychowdhury, Tianshi Wang, A. Gokcen Mahmutoglu, Archit Gupta

    This is a presentation given to the CMC (Compact Modeling Coalition) on March 23, 2017, describing the ModSpec device modelling format and its benefits as a standard for compact model...


  4. Well-Posed Device Models for Electrical Circuit Simulation

    27 Mar 2017 | Papers | Contributor(s): A. Gokcen Mahmutoglu, Tianshi Wang, Archit Gupta, Jaijeet Roychowdhury

    This document provides guidelines for creating computational device models that work well in simulation. We build our discussion around the mathematical notion of “well-posedness”. We...


  5. sugarcube-cad

    12 May 2016 | Tools | Contributor(s): Jason Clark, Quincy Clark

    CAD for MEMS via systems of compact models. This commercial tool is published by Sugarcube Systems, which requires a registration fee to use. The nanoHUB does not receive revenue or assume...


  6. NEEDS Compact Model Development Process - v0.1

    17 Feb 2014 | Online Presentations | Contributor(s): Michael McLennan

    The Nano-Engineered Electronic Device Simulation (NEEDS) effort is focused on creating compact models for nanoelectronics. The process involves a new Berkeley Model Development Environment (MDE)...


  7. Adair Gerke


  8. is anybody have compact model of silicon nanowire transistor? which can use for ckt simulation

    Closed | Responses: 0


  9. Francisco J. Garcia-Sanchez

    Francisco. J. García Sánchez is a research professor at Universidad Simón Bolívar (USB), Caracas, Venezuela. He was the founder of USB's Solid-State Electronics Lab in the early 1980's. His...