Tags: Device Modeling

All Categories (1-20 of 23)

  1. Atomistic Modeling of Nano Devices: From Qubits to Transistors

    13 Apr 2016 | | Contributor(s):: Rajib Rahman

    In this talk, I will describe such a framework that can capture complex interactions ranging from exchange and spin-orbit-valley coupling in spin qubits to non-equilibrium charge transport in tunneling transistors. I will show how atomistic full configuration interaction calculations of exchange...

  2. A UCSD analytic TFET model

    18 Dec 2015 | | Contributor(s):: Jianzhi Wu, Yuan Taur

    A continuous, analytic I-V model is developed for double-gate and nanowire tunnel FETs with 3D density of states, including depletion in the source. At the core of the model is a gate-controlled channel potential that satisfies the source and drain boundary conditions. Verified by...

  3. Sunjeet Jena

    http://nanohub.org/members/130889

  4. Shubhajit Mukherjee

    http://nanohub.org/members/111436

  5. Venu Madhava Rao S.P.

    http://nanohub.org/members/105582

  6. Device Physics Studies of III-V and Silicon MOSFETS for Digital Logic

    28 Jun 2013 | | Contributor(s):: Himadri Pal

    III-V's are currently gaining a lot of attraction as possible MOSFET channel materials due to their high intrinsic mobility. Several challenges, however, need to be overcome before III-V's can replace silicon (Si) in extremely scaled devices. The effect of low density-of-states of III-V...

  7. III-V Nanoscale MOSFETS: Physics, Modeling, and Design

    28 Jun 2013 | | Contributor(s):: Yang Liu

    As predicted by the International Roadmap for Semiconductors (ITRS), power consumption has been the bottleneck for future silicon CMOS technology scaling. To circumvent this limit, researchers are investigating alternative structures and materials, among which III-V compound semiconductor-based...

  8. Inelastic Transport in Carbon Nanotube Electronic and Optoelectronic Devices

    28 Jun 2013 | | Contributor(s):: Siyu Koswatta

    Discovered in the early 1990's, carbon nanotubes (CNTs) are found to have exceptional physical characteristics compared to conventional semiconductor materials, with much potential for devices surpassing the performance of present-day electronics. Semiconducting CNTs have large carrier...

  9. Quantum and Atomistic Effects in Nanoelectronic Transport Devices

    28 Jun 2013 | | Contributor(s):: Neophytos Neophytou

    As devices scale towards atomistic sizes, researches in silicon electronic device technology are investigating alternative structures and materials. As predicted by the International Roadmap for Semiconductors, (ITRS), structures will evolve from planar devices into devices that include 3D...

  10. Modeling Quantum Transport in Nanoscale Transistors

    28 Jun 2013 | | Contributor(s):: Ramesh Venugopal

    As critical transistor dimensions scale below the 100 nm (nanoscale) regime, quantum mechanical effects begin to manifest themselves and affect important device performance metrics. Therefore, simulation tools which can be applied to design nanoscale transistors in the future, require new theory...

  11. Udoy Paul

    http://nanohub.org/members/68281

  12. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Characterization, Material/Process Dependence and Predictive Modeling

    28 Mar 2012 | | Contributor(s):: Souvik Mahapatra

    This is a presentation on Negative Bias Temperature Instability (NBTI), observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10 years it has become a very important reliability concern as the industry moved from thicker SiO2 to thinner SiON...

  13. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Fast and Ultra-fast Characterization Methods (Part 1 of 3)

    28 Mar 2012 | | Contributor(s):: Souvik Mahapatra

  14. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Predictive Modeling (Part 3 of 3)

    28 Mar 2012 | | Contributor(s):: Souvik Mahapatra

    This is a presentation on Negative Bias Temperature Instability (NBTI), observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10 years it has become a very important reliability concern as the industry moved from thicker SiO2 to thinner SiON...

  15. Negative Bias Temperature Instability (NBTI) in p-MOSFETs: The Impact of Gate Insulator Processes (Part 2 of 3)

    28 Mar 2012 | | Contributor(s):: Souvik Mahapatra

    This presentation is part 2 on Negative Bias Temperature Instability (NBTI), observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10 years it has become a very important reliability concern as the industry moved from thicker SiO2 to thinner...

  16. Dhawal Dilip Mahajan

    http://nanohub.org/members/65429

  17. Silvaco Athena - Part 3

    09 Aug 2011 | | Contributor(s):: Dragica Vasileska

    This set of slides describes the fabrication of 100 nm channel length MOSFET device. At the end the formation of Bird's Beaks is discussed.

  18. Device Parameters Extraction Within Silvaco Simulation Software

    30 Jul 2011 | | Contributor(s):: Dragica Vasileska

    This set of slides explains the extract statements within SILVACO simulation software.

  19. 2011 NCN@Purdue Summer School: Electronics from the Bottom Up

    20 Jul 2011 |

    click on image for larger versionAlumni Discussion Group: LinkedIn

  20. Solar Cells Lecture 3: Modeling and Simulation of Photovoltaic Devices and Systems

    20 Jul 2011 | | Contributor(s):: J. L. Gray

    Modeling and simulation play an important role in designing and optimizing PV systems. This tutorial is a broad overview of the topic including a look at detailed, numerical device simulation.