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On June 30, 1948, AT&T Bell Labs unveiled the transitor to the world, creating a spark of explosive economic growth that would lead into the Information Age. William Shockley led a team of researchers, including Walter Brattain and John Bardeen, who invented the device. Like the existing triode vacuum tube device, the transistor could amplify signals and switch currents on and off, but the transistor was smaller, cheaper, and more efficient. Moreover, it could be integrated with millions of other transistors onto a single chip, creating the integrated circuit at the heart of modern computers.
Today, most transistors are being manufactured with a minimum feature size of 60-90nm--roughly 200-300 atoms. As the push continues to make devices even smaller, researchers must account for quantum mechanical effects in the device behavior. With fewer and fewer atoms, the positions of impurities and other irregularities begin to matter, and device reliability becomes an issue. So rather than shrink existing devices, many researchers are working on entirely new devices, based on carbon nanotubes, spintronics,
molecular conduction, and other nanotechnologies.
Learn more about transistors from the many resources on this site, listed below. Use our simulation tools to simulate performance characteristics for your own devices.
Keithley 4200-SCS Lecture 12: Ultra-fast I-V for Pulsed and Transient Characterization
24 Jan 2011 | Online Presentations | Contributor(s): Lee Stauffer
Keithley 4200-SCS Lecture 01: Introduction - System Overview - DC I-V Source Measurement
20 Jan 2011 | Online Presentations | Contributor(s): Lee Stauffer
Introduction to Device Characterization -
System Overview: System Architecture, Hardware Features and Software Features -
Precision DC I-V Source-Measure Features and Concepts.
Keithley 4200-SCS Lecture 02: Basics of Keithley Interactive Test Environment (KITE)
Keithley 4200-SCS Lecture 03: More KITE Setup and Features
Keithley 4200-SCS Lecture 04: Speed and Timing Considerations
Keithley 4200-SCS Lecture 05: Low Current and High Resistance Measurements
Keithley 4200-SCS Lecture 06: Troubleshooting
Keithley 4200-SCS Lecture 07: KCON Utility Overview
Keithley 4200-SCS Lecture 08: 4210 CVU Instrument Module - Overview
Theory of Operation and Measurement Overview
Keithley 4200-SCS Lecture 09: 4210 CVU Instrument Module - Measurement Techniques I
Measurement Techniques and Optimization
Keithley 4200-SCS Lecture 10: 4210 CVU Instrument Module - Measurement Techniques II
Keithley 4200-SCS: KITE Demo
Keithley 4200-SCS Lecture 11: 4210 CVU Instrument Module - Troubleshooting
Device Characterization with the Keithley 4200-SCS
20 Jan 2011 | Courses | Contributor(s): Lee Stauffer
This training session is based on the Keithley 4200-SCS Semiconductor Characterization System. It is intended for beginning to intermediate users. It covers basic concepts, both of the instrument,...
Atomistic Modeling and Simulation Tools for Nanoelectronics and their Deployment on nanoHUB.org
16 Dec 2010 | Online Presentations | Contributor(s): Gerhard Klimeck
At the nanometer scale the concepts of device and material meet and a new device is a new material and vice versa. While atomistic device representations are novel to device physicists, the...
Chemically Enhanced Carbon-Based Nanomaterials and Devices
09 Nov 2010 | Online Presentations | Contributor(s): Mark Hersam
Carbon-based nanomaterials have attracted significant attention due to their potential to enable and/or improve applications such as transistors, transparent conductors, solar cells, batteries,...
Nanoelectronic Devices, With an Introduction to Spintronics
09 Sep 2010 | Courses | Contributor(s): Supriyo Datta, Mark Lundstrom
Nanoelectronic devices are at the heart of today's powerful computers and are also of great interest for many emerging applications including...
Discussion Session 2 (Lectures 3 and 4)
08 Sep 2010 | Online Presentations | Contributor(s): Supriyo Datta
“Electronics from the Bottom Up” is an educational initiative designed to bring a new perspective to the field of nano device engineering. It is co-sponsored by the Intel Foundation and the...
Lecture 3: Introduction to NEGF
“Electronics from the Bottom Up” is an educational initiative designed to bring a new perspective to the field of nano device engineering. It is co-sponsored by the Intel Foundation and...
Nanoelectronic Modeling Lecture 40: Performance Limitations of Graphene Nanoribbon Tunneling FETS due to Line Edge Roughness
05 Aug 2010 | Online Presentations | Contributor(s): Gerhard Klimeck, Mathieu Luisier
This presentation the effects of line edge roughness on graphene nano ribbon (GNR) transitors..
GNR TFET Simulation
pz Tight-Binding Orbital Model