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I want to make a compact model for FinFET with Verilog-A to use it in HSpice, but I'm really new in this subject and don't know where to start. Can anyone help me with some documents in this subject?
Closed | Responses: 0
how to decide device characteristic while designing a device?
Finfet raw files needed
Hello, I wanted to simulate these files using HSpice. I wanted to see the transfer characteristics for temperature variation. Unfortunately the look up table is designed in...
How to get the Finfet model library file for cadence for simulation ???
How to get a model file for FinFET ???
Are there any clear advantages to either UTB SOI vs FinFet devices?
Open | Responses: 1
I have been doing some reading on these devices and it seems that both structures give the gate more control and suppress the influence of the drain voltage on the channel. So, is there a clear...