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7nm Si FinFET Models with Symmetric and Asymmetric Underlap for Circuit Simulations
23 Aug 2013 | Downloads | Contributor(s): Arun Goud Akkala, Sumeet Kumar Gupta, Sri Harsha Choday, Kaushik Roy
This tarball contains Verilog-A compact lookup table models for 7nm channel length Si FinFET with different underlaps which can be used in HSPICE netlists for circuit simulations....
Quantum and Thermal Effects in Nanoscale Devices
4.5 out of 5 stars
18 Sep 2008 | Online Presentations | Contributor(s): Dragica Vasileska
To investigate lattice heating within a Monte Carlo device simulation framework, we simultaneously solve the Boltzmann transport equation for the electrons, the 2D Poisson equation to get the...
0.0 out of 5 stars
01 May 2008 | Tools | Contributor(s): SungGeun Kim, Gerhard Klimeck, Sriraman Damodaran, Benjamin P Haley
Simulate the nanoscale multigate-FET structures (finFET and nanowire) using drift diffusion approaches
MuGFET: First-Time User Guide
28 Apr 2008 | Teaching Materials | Contributor(s): SungGeun Kim, Sriraman Damodaran, Benjamin P Haley, Gerhard Klimeck
MuGFET is a simulation tool for nano-scale multi-gate FET structures.
This document provides instructions on how to use MuGFET.
MuGFET users can use also the PROPHET or the PADRE tool. Either...