
I want to make a compact model for FinFET with VerilogA to use it in HSpice, but I'm really new in this subject and don't know where to start. Can anyone help me with some documents in this subject?
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http://nanohub.org/answers/question/1942

Achintya Priydarshi
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Contact Resistances in Trigate & FinFET Devices
22 Mar 2016   Contributor(s):: YannMichel Niquet
IWCE 2015 presentation.

Study of the Interface Roughness Models using 3D Finite Element Schrödinger Equation Corrected Monte Carlo Simulator on Nanoscaled FinFET
25 Jan 2016   Contributor(s):: Daniel Nagy, Muhammad Ali A. Elmessary, Manuel Aldegunde, Karol Kalna
IWCE 2015 presentation. Interface roughness scattering (IRS) is one of the key limiting scattering mechanism for both planar and nonplanar CMOS devices. To predict the performance of future scaled devices and new structures the quantum mechanical confinement based IRS models are...

how to decide device characteristic while designing a device?
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Hello,
http://nanohub.org/answers/question/1652

Finfet raw files needed
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Hello, I wanted to simulate these files using HSpice. I wanted to see the transfer characteristics for temperature variation. Unfortunately the look up table is designed in...
http://nanohub.org/answers/question/1566

7nm Si FinFET Models with Symmetric and Asymmetric Underlap for Circuit Simulations
23 Aug 2013   Contributor(s):: Arun Goud Akkala, Sumeet Kumar Gupta, Sri Harsha Choday, Kaushik Roy
This tarball contains VerilogA compact lookup table models for 7nm channel length Si FinFET with different underlaps which can be used in HSPICE netlists for circuit simulations. Device simulation data for constructing the lookup table model was generated using NEMO5 atomistic...

Pankaj Kumar Pal
http://nanohub.org/members/82565

Mohamed Tarek Ghoneim
Keywords: device physics, flexible electronics, nanotechnology, graphene, nonvolatile memory, reliability, CMOS, physical and electrical characterization, emerging devices, power management, VLSI,...
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How to get the Finfet model library file for cadence for simulation ???
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http://nanohub.org/answers/question/1148

How to get a model file for FinFET ???
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http://nanohub.org/answers/question/1146

Asrulnizam Abd Manaf
Dr. Asrulnizam bin Abd Manaf received the BEng in Electrical and Electronic Engineering from Toyohashi University of Technology, Japan in 2001. Then, he worked as electrical engineer at...
http://nanohub.org/members/70293

Are there any clear advantages to either UTB SOI vs FinFet devices?
Open  Responses: 1
I have been doing some reading on these devices and it seems that both structures give the gate more control and suppress the influence of the drain voltage on the channel. So, is there a clear...
http://nanohub.org/answers/question/934

keerti kumar korlapati
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Vivek Asthana
http://nanohub.org/members/49925

Quantum and Thermal Effects in Nanoscale Devices
18 Sep 2008   Contributor(s):: Dragica Vasileska
To investigate lattice heating within a Monte Carlo device simulation framework, we simultaneously solve the Boltzmann transport equation for the electrons, the 2D Poisson equation to get the selfconsistent fields and the hydrodynamic equations for acoustic and optical phonons. The phonon...

MuGFET
17 Jan 2008   Contributor(s):: SungGeun Kim, Gerhard Klimeck, Sriraman Damodaran, Benjamin P Haley
Simulate the nanoscale multigateFET structures (finFET and nanowire) using drift diffusion approaches

MuGFET: FirstTime User Guide
28 Apr 2008   Contributor(s):: SungGeun Kim, Sriraman Damodaran, Benjamin P Haley, Gerhard Klimeck
MuGFET is a simulation tool for nanoscale multigate FET structures.This document provides instructions on how to use MuGFET. MuGFET users can use also the PROPHET or the PADRE tool. Either of these provide selfconsistent solutions to the Poisson and driftdiffusion equation.At the nanometer...