Tags: high-k metal gates

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  1. ECE 606 L32.3: Modern MOSFET - Control of Threshold Voltage

    20 Jul 2023 | | Contributor(s):: Gerhard Klimeck

  2. Moore’s Law Extension and Beyond

    19 Nov 2018 | | Contributor(s):: Peide "Peter" Ye

    In his talk, Ye will review his research efforts at Purdue on materials, structures and device architecture to support the microelectronic industry and extend Moore’s Law. The goal of the research is that it will lead to smarter, ubiquitous computing technology and keep us healthier,...

  3. Effect of the High-k Dielectric/Semiconductor Interface on Electronic Properties in Ultra-thin Channels

    15 Oct 2015 | | Contributor(s):: Daniel A. Valencia-Hoyos, Evan Michael Wilson, mark rodwell, Gerhard Klimeck, Michael Povolotskyi

    IWCE 2015 presentation.  Abstract and more information to be added at a later date. As logic devices continue to downscale, an increasing fraction of the channel atoms are in close contact with oxide atoms of the gate. These surface atoms experience a chemical environment that is distinct...

  4. Theory and characterization of random defect formation and its implication in variability of nanoscale transistors

    30 Sep 2011 | | Contributor(s):: Ahmad Ehteshamul Islam

    Over the last 50 years, carrier transport has been the central research topic in the semiconductor area. The outcome was a dramatic improvement in the performance of a transistor, which is one of the basic building blocks in almost all the modern electronic devices. However, nanoscale dimensions...

  5. Esteve Amat

    https://nanohub.org/members/52897

  6. A methodology for SPICE-compatible modeling of nanoMOSFETs

    17 Nov 2010 | | Contributor(s):: Alba Graciela Avila, David Espejo

    An original SPICE-compatible model for Intel's 45nm High-K MOSFET is presented. It takes into account some Quantum-Mechanical Effects that occur at small scale like Channel Length Modulation (CLM), Threshold Voltage variation and Velocity saturation, and is the first in his class that is not...

  7. Negative Bias Temperature Instability (NBTI)

    Courses|' 22 Nov 2016

    In this modular course, we will cover recent advances in Negative Bias Temperature Instability (NBTI), which is a crucial reliability issue for Silicon Oxynitride and High K Metal Gate PMOS...

    https://nanohub.org/courses/NBTI