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IWCN 2021: Interfacial Trap Effects in InAs Gate-all-around Nanowire Tunnel Field- Effect Transistors: First-Principles-Based Approach
15 Jul 2021 | | Contributor(s):: Hyeongu Lee, SeongHyeok Jeon, Cho Yucheol, Mincheol Shin
In this work, we investigated the effects of the traps, Arsenic dangling bond (AsDB) and Arsenic anti-site (AsIn) traps, in InAs gate-all-around nanowire TFETs, using the trap Hamiltonian obtained from the first-principles calculations. The transport properties were treated by nonequilibrium...
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IWCN 2021: Computational Research of CMOS Channel Material Benchmarking for Future Technology Nodes: Missions, Learnings, and Remaining Challenges
15 Jul 2021 | | Contributor(s):: raseong kim, Uygar Avci, Ian Alexander Young
In this preentation, we review our journey of doing CMOS channel material benchmarking for future technology nodes. Through the comprehensive computational research for past several years, we have successfully projected the performance of various novel material CMOS based on rigorous physics...
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Moore’s Law Extension and Beyond
19 Nov 2018 | | Contributor(s):: Peide "Peter" Ye
In his talk, Ye will review his research efforts at Purdue on materials, structures and device architecture to support the microelectronic industry and extend Moore’s Law. The goal of the research is that it will lead to smarter, ubiquitous computing technology and keep us healthier,...
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Asifali Mir
As simple as QM
https://nanohub.org/members/214226
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Steven Estrella
https://nanohub.org/members/189991
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[Illinois] New directions in III-V MBE: from materials to devices
13 Apr 2017 | | Contributor(s):: Minjoo Larry Lee
9/8/2016 MNTL Industry Affiliates Program
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Thermal Conductivity of III-V Semiconductor Superlattices
25 Jan 2016 | | Contributor(s):: Song Mei, Zlatan Aksamija, Irena Knezevic
IWCE 2015 presentation. An InGaAs/InAlAs superlattice (SL) on an InP substrate is the mainstream material system for mid- IR quantum cascade lasers (QCL). The thermal conductivity tensor of SLs is critical for energy-efficient performance of QCLs; understanding the relative importance of...
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Mode Space Tight Binding Model for Ultra-Fast Simulations of III-V Nanowire MOSFETs and Heterojunction TFETs
13 Nov 2015 | | Contributor(s):: Aryan Afzalian, Jun Huang, Hesameddin Ilatikhameneh, Santiago Alonso Perez Rubiano, Tillmann Christoph Kubis, Michael Povolotskyi, Gerhard Klimeck
IWCE 2015 presentation. we explore here the suitability of a mode space tight binding algorithm to various iii-v homo- and heterojunction nanowire devices. we show that in iii-v materials, the number of unphysical modes to eliminate is very high compared to the si case previously reported...
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Nanometer-Scale III-V Electronics: from Quantum-Well Planar MOSFETs to Vertical Nanowire MOSFETs
05 Oct 2015 | | Contributor(s):: Juses A. del Alamo
This talk will review recent progress as well as challenges confronting III-V electronics for future logic applications with emphasis on the presenter’s research activities at MIT.
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Thermoelectric Device Compact Model
01 Sep 2015 | Compact Models | Contributor(s):
By Xufeng Wang1, Kyle Conrad1, Jesse Maassen1, Mark Lundstrom1
Purdue University
The NEEDS thermoelectric compact model describes a homogeneous segment of thermoelectric material and serves as a basic building block for complex electrothermal system.
https://nanohub.org/publications/80/?v=1
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Ritam Sarkar
https://nanohub.org/members/118773
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Md. Tanvir Hasan
https://nanohub.org/members/113030
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Yassine Sayad
https://nanohub.org/members/103336
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Simulation and Admittance Analysis for Advanced Metal-Insulator-Semiconductor Characterization
23 Feb 2014 | | Contributor(s):: Alex Grede
Non-parabolic DOS simulation of III-V MISCAPs with impurity ionization effects and ability to view components of channel capacitance.
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Device Physics Studies of III-V and Silicon MOSFETS for Digital Logic
25 Jun 2013 | | Contributor(s):: Himadri Pal
III-V's are currently gaining a lot of attraction as possible MOSFET channel materials due to their high intrinsic mobility. Several challenges, however, need to be overcome before III-V's can replace silicon (Si) in extremely scaled devices. The effect of low density-of-states of III-V materials...
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III-V Nanoscale MOSFETS: Physics, Modeling, and Design
25 Jun 2013 | | Contributor(s):: Yang Liu
As predicted by the International Roadmap for Semiconductors (ITRS), power consumption has been the bottleneck for future silicon CMOS technology scaling. To circumvent this limit, researchers are investigating alternative structures and materials, among which III-V compound semiconductor-based...
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Quantum and Atomistic Effects in Nanoelectronic Transport Devices
26 Jun 2013 | | Contributor(s):: Neophytos Neophytou
As devices scale towards atomistic sizes, researches in silicon electronic device technology are investigating alternative structures and materials. As predicted by the International Roadmap for Semiconductors, (ITRS), structures will evolve from planar devices into devices that include 3D...
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Exploring New Channel Materials for Nanoscale CMOS
27 Jun 2013 | | Contributor(s):: Anisur Rahman
The improved transport properties of new channel materials, such as Ge and III-V semiconductors, along with new device designs, such as dual gate, tri gate or FinFETs, are expected to enhance the performance of nanoscale CMOS devices. Novel process techniques, such as ALD, high-# dielectrics, and...
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Is Graphene Alone in the Universe?
30 Nov 2012 | | Contributor(s):: Jacob B. Khurgin
In this talk we show that many heterostructures based on III-V (InGaSb) and II-VI (HgCdTe) semiconductors can be engineered to have all the above properties nearly indistinguishable from those of graphene, while adding certain degree of versatility, such as ability to have not only 2-dimensional,...
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Pengyu Long
https://nanohub.org/members/68278