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Thermal Conductivity of III-V Semiconductor Superlattices
25 Jan 2016 | Online Presentations | Contributor(s): Song Mei, Zlatan Aksamija, Irena Knezevic
IWCE 2015 presentation. An InGaAs/InAlAs superlattice (SL) on an InP substrate is the mainstream material system for mid- IR quantum cascade lasers (QCL). The thermal conductivity tensor of...
Mode Space Tight Binding Model for Ultra-Fast Simulations of III-V Nanowire MOSFETs and Heterojunction TFETs
13 Nov 2015 | Online Presentations | Contributor(s): Aryan Afzalian, Jun Huang, Hesameddin Ilatikhameneh, Santiago Alonso Perez Rubiano, Tillmann Christoph Kubis, Michael Povolotskyi, Gerhard Klimeck
IWCE 2015 presentation. we explore here the suitability of a mode space tight binding algorithm to various iii-v homo- and heterojunction nanowire devices. we show that in iii-v materials,...
Nanometer-Scale III-V Electronics: from Quantum-Well Planar MOSFETs to Vertical Nanowire MOSFETs
05 Oct 2015 | Online Presentations | Contributor(s): Juses A. del Alamo
This talk will review recent progress as well as challenges confronting III-V electronics for future logic applications with emphasis on the presenter’s research activities at MIT.
Md. Tanvir Hasan
Simulation and Admittance Analysis for Advanced Metal-Insulator-Semiconductor Characterization
0.0 out of 5 stars
27 Feb 2014 | Tools | Contributor(s): Alex Grede
Non-parabolic DOS simulation of III-V MISCAPs with impurity ionization effects and ability to view components of channel capacitance.
Device Physics Studies of III-V and Silicon MOSFETS for Digital Logic
28 Jun 2013 | Papers | Contributor(s): Himadri Pal
III-V's are currently gaining a lot of attraction as possible MOSFET channel materials due to their high intrinsic mobility. Several challenges, however, need to be overcome before III-V's can...
III-V Nanoscale MOSFETS: Physics, Modeling, and Design
28 Jun 2013 | Papers | Contributor(s): Yang Liu
As predicted by the International Roadmap for Semiconductors (ITRS), power consumption has been the bottleneck for future silicon CMOS technology scaling. To circumvent this limit, researchers are...
Quantum and Atomistic Effects in Nanoelectronic Transport Devices
28 Jun 2013 | Papers | Contributor(s): Neophytos Neophytou
As devices scale towards atomistic sizes, researches in silicon electronic device technology are investigating alternative structures and materials. As predicted by the International Roadmap for...
Exploring New Channel Materials for Nanoscale CMOS
28 Jun 2013 | Papers | Contributor(s): Anisur Rahman
The improved transport properties of new channel materials, such as Ge and III-V semiconductors, along with new device designs, such as dual gate, tri gate or FinFETs, are expected to enhance the...
Evan Michael Anderson