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The metal–oxide–semiconductor field-effect transistor is a device used for amplifying or switching electronic signals. In MOSFETs, a voltage on the oxide-insulated gate electrode can induce a conducting channel between the two other contacts called source and drain. The channel can be of n-typeor p-type, and is accordingly called an nMOSFET or a pMOSFET (also commonly nMOS, pMOS). It is by far the most common transistor in both digital and analog circuits, though the bipolar junction transistor was at one time much more common. More information on MOSFET can be found here.
MOSFET Design Calculations - Step 2
05 Mar 2012 | | Contributor(s):: Stella Quinones, Jose Valdez
A series of homework assignments were created to introduce senior level undergraduate Electrical and Computer Engineering students to the design of MOSFETs by combining calculations of MOSFET related design parameters for a set of doping and oxide thickness values with the analysis of MOSFET...
Silvaco Athena - Part 3
09 Aug 2011 | | Contributor(s):: Dragica Vasileska
This set of slides describes the fabrication of 100 nm channel length MOSFET device. At the end the formation of Bird's Beaks is discussed.
MOSFET Lab Exercise: Series Resistance and Transistor Breakdown
13 Jul 2011 | | Contributor(s):: Dragica Vasileska, Gerhard Klimeck
This exercise is supposed to teach the students the role of the source and drain resistance on device output characteristics. The second portion of the assignment is supposed to train students how to simulate MOSFET operation near transistor breakdown.
MOSFet Learning Materials
By completing the MOSFET Lab in ABACUS - Assembly of Basic Applications for Coordinated Understanding of Semiconductors, users will be able to understand a) the operation of MOSFET devices, b)...
Negative Bias Temperature Instability (NBTI) in p-MOSFETs: Characterization, Material/Process Dependence and Predictive Modeling (2011)
11 May 2011 | | Contributor(s):: Souvik Mahapatra
This is a presentation on Negative Bias Temperature Instability, or in short NBTI, observed in p channel MOSFET devices. Though NBTI has been discovered more than 40 years ago, in the last 10 years it has become a very important reliability concern as the industry moved from thicker SiO2 to...
simulation does not give any result
Closed | Responses: 0
I simulated a n-type mosfet with following settings:
device type mosfet n-type
gaussian S/D doping density
source/drain length: 50nm
source/drain nodes: 15
channel length: 35 http://nanohub.org/answers/question/771
14 Feb 2006 | | Contributor(s):: Anisur Rahman, Jing Wang, Jing Guo, Md. Sayed Hasan, Yang Liu, Akira Matsudaira, Shaikh S. Ahmed, Supriyo Datta, Mark Lundstrom
Calculate the ballistic I-V characteristics for conventional MOSFETs, Nanowire MOSFETs and Carbon NanoTube MOSFETs
Onkar Shrinivas Bhende
OMEN Nanowire Homework Problems
23 Jan 2011 | | Contributor(s):: SungGeun Kim
OMEN Nanowire homework problems: anyone who has gone through the first-time user guide of OMEN Nanowire and done the examples in the guide should be able to run simulations in these homework problems and find the answers to them.
MOSFET Lab - Scaling
02 Jan 2011 | | Contributor(s):: Saumitra Raj Mehrotra, Gerhard Klimeck, Dragica Vasileska
The concept of device scaling and the need to control short channel effects is used in this real life problem
MOSFET Design Calculations - Step 1
30 Dec 2010 | | Contributor(s):: Stella Quinones, Jose Valdez
MOSFET Design Calculations - Step 1 (Instructor Copy)
31 Dec 2010 | | Contributor(s):: Stella Quinones, Jose Valdez
MOSFET Design Calculations - Step 2 (Instructor Copy)
How to see the occupation of electrons with strain
Closed | Responses: 1
How do I witness the variation of occupancies of electrons in the 6 conduction band minima’s with the applied strain. Can anyone suggest me the good simulation tool for the same.
MOSFET Worked out problems 1
06 Dec 2010 | | Contributor(s):: Saumitra Raj Mehrotra, Gerhard Klimeck
Short channel effects in a MOSFET due to channel length scaling are highlighted in this worked out problem.
A methodology for SPICE-compatible modeling of nanoMOSFETs
17 Nov 2010 | | Contributor(s):: Alba Graciela Avila, David Espejo
An original SPICE-compatible model for Intel's 45nm High-K MOSFET is presented. It takes into account some Quantum-Mechanical Effects that occur at small scale like Channel Length Modulation (CLM), Threshold Voltage variation and Velocity saturation, and is the first in his class that is not...
ABACUS: Test for MOSFET Tool
17 Oct 2010 | | Contributor(s):: Saumitra Raj Mehrotra, Dragica Vasileska, Gerhard Klimeck
The objective of this test is to give an idea to a self-learning students or to instructors in the case this test is used in a classroom the level of understanding of this topic when students have gone through the learning material, worked exercises and have completed the assignments and the...